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Date: Fri, 4 Nov 2016 13:51:18 +0800 From: Rick Chang <rick.chang@...iatek.com> To: Hans Verkuil <hans.verkuil@...co.com>, Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>, Mauro Carvalho Chehab <mchehab@...nel.org>, Matthias Brugger <matthias.bgg@...il.com> CC: <linux-kernel@...r.kernel.org>, <linux-media@...r.kernel.org>, <srv_heupstream@...iatek.com>, <linux-mediatek@...ts.infradead.org>, Minghsiu Tsai <minghsiu.tsai@...iatek.com>, Rick Chang <rick.chang@...iatek.com> Subject: [PATCH v3 1/3] dt-bindings: mediatek: Add a binding for Mediatek JPEG Decoder Add a DT binding documentation for Mediatek JPEG Decoder of MT2701 SoC. Signed-off-by: Rick Chang <rick.chang@...iatek.com> Signed-off-by: Minghsiu Tsai <minghsiu.tsai@...iatek.com> --- .../bindings/media/mediatek-jpeg-codec.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-codec.txt diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-codec.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-codec.txt new file mode 100644 index 0000000..b2b19ed --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-codec.txt @@ -0,0 +1,35 @@ +* Mediatek JPEG Decoder + +Mediatek JPEG Decoder is the JPEG decode hw present in Mediatek SoCs + +Required properties: +- compatible : "mediatek,mt2701-jpgdec" +- reg : physical base address of the jpeg decoder registers and length of + memory mapped region. +- interrupts : interrupt number to the interrupt controller. +- clocks: device clocks, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. +- clock-names: must contain "jpgdec-smi" and "jpgdec". +- power-domains: a phandle to the power domain, see + Documentation/devicetree/bindings/power/power_domain.txt for details. +- mediatek,larb: must contain the local arbiters in the current Socs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + for details. +- iommus: should point to the respective IOMMU block with master port as + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt + for details. + +Example: + jpegdec: jpegdec@...04000 { + compatible = "mediatek,mt2701-jpgdec"; + reg = <0 0x15004000 0 0x1000>; + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>; + clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, + <&imgsys CLK_IMG_JPGDEC>; + clock-names = "jpgdec-smi", + "jpgdec"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; + mediatek,larb = <&larb2>; + iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, + <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; + }; -- 1.9.1
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