linux-kernel - Re: [PATCH 5/10] dt: bindings: Add bindings for Marvell Xenon SD Host Controller

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Date:   Thu, 24 Nov 2016 11:04:36 +0100
From:   Arnd Bergmann <arnd@...db.de>
To:     linux-arm-kernel@...ts.infradead.org
Cc:     Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
        Gregory CLEMENT <gregory.clement@...e-electrons.com>,
        Jimmy Xu <zmxu@...vell.com>, Andrew Lunn <andrew@...n.ch>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Romain Perier <romain.perier@...e-electrons.com>,
        Liuliu Zhao <zhaoliul@...vell.com>,
        Peng Zhu <zhupeng@...vell.com>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Nadav Haklai <nadavh@...vell.com>,
        Ziji Hu <huziji@...vell.com>, Victor Gu <xigu@...vell.com>,
        Doug Jones <dougj@...vell.com>,
        Jisheng Zhang <jszhang@...vell.com>,
        Yehuda Yitschak <yehuday@...vell.com>,
        "Wei(SOCP) Liu" <liuw@...vell.com>,
        Xueping Liu <xpliu@...vell.com>,
        Hilbert Zhang <zzhang@...vell.com>,
        Shiwu Zhang <zhangshw@...vell.com>, Yu Cao <yucao@...vell.com>,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Jason Cooper <jason@...edaemon.net>,
        Keji Zhang <keji@...vell.com>,
        Kostya Porotchkin <kostap@...vell.com>,
        Ryan Gao <ygao@...vell.com>, Marcin Wojtas <mw@...ihalf.com>,
        Hanna Hawa <hannah@...vell.com>,
        "Jack(SH) Zhu" <jmzhu@...vell.com>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Wilson Ding <dingwei@...vell.com>
Subject: Re: [PATCH 5/10] dt: bindings: Add bindings for Marvell Xenon SD Host Controller

On Thursday, November 24, 2016 10:48:58 AM CET Thomas Petazzoni wrote:
> Hello,
> 
> On Thu, 24 Nov 2016 10:44:48 +0100, Gregory CLEMENT wrote:
> 
> > "A single Xenon IP can support multiple slots.
> > Each slot acts as an independent SDHC. It owns independent resources, such
> > as register sets clock and PHY.
> > Each slot should have an independent device tree node."
> 
> I think this wording is still very confusing, and continues to cause
> confusion.
> 
> We should just state that each Xenon controller supports a single slot,
> and that's it.
> 
> The text still says "a single Xenon IP can support multiple slots",
> which continues to cause confusion.

Agreed. Ideally we'd find out why exactly the slot number must
be used for accessing some of the registers to have a better
explanation to put in there, aside from stating that only one
slot is supported but the number must be set.

Could it be that this is some form of pinmuxing, i.e. that each
controller could in theory be used for any of the slots but you
have to pick one of them?

	Arnd