linux-kernel - [PATCH] USB3/DWC3: Enable undefined length INCR burst type

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Date:   Tue, 13 Dec 2016 17:06:23 +0800
From:   Changming Huang <jerry.huang@....com>
To:     <balbi@...nel.org>, <gregkh@...uxfoundation.org>
CC:     <linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Changming Huang <jerry.huang@....com>,
        Rajesh Bhagat <rajesh.bhagat@....com>
Subject: [PATCH] USB3/DWC3: Enable undefined length INCR burst type

While enabling undefined length INCR burst type and INCR16 burst type,
get better write performance on NXP Layerscape platform:
around 3% improvement (from 364MB/s to 375MB/s).

Signed-off-by: Changming Huang <jerry.huang@....com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@....com>
---
 drivers/usb/dwc3/core.c |    6 ++++++
 drivers/usb/dwc3/core.h |   13 +++++++++++++
 2 files changed, 19 insertions(+)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index fea4469..0e11891 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -621,6 +621,12 @@ static int dwc3_core_init(struct dwc3 *dwc)
 		goto err0;
 	}
 
+	/* Enable Undefined Length INCR Burst Type and Enable INCR16 Burst */
+	reg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0);
+	reg &= ~DWC3_GSBUSCFG0_INCRBRSTMASK;
+	reg |= DWC3_GSBUSCFG0_INCR16BRSTENA | DWC3_GSBUSCFG0_INCRBRSTENA;
+	dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, reg);
+
 	/*
 	 * Write Linux Version Code to our GUID register so it's easy to figure
 	 * out which kernel version a bug was found.
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 6b60e42..8bfdb77 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -156,6 +156,19 @@
 
 /* Bit fields */
 
+/* Global SoC Bus Configuration Register 0 */
+#define DWC3_GSBUSCFG0_DATABIGEND	(1 << 11)
+#define DWC3_GSBUSCFG0_DESCBIGEND	(1 << 10)
+#define DWC3_GSBUSCFG0_INCR256BRSTENA	(1 << 7)
+#define DWC3_GSBUSCFG0_INCR128BRSTENA	(1 << 6)
+#define DWC3_GSBUSCFG0_INCR64BRSTENA	(1 << 5)
+#define DWC3_GSBUSCFG0_INCR32BRSTENA	(1 << 4)
+#define DWC3_GSBUSCFG0_INCR16BRSTENA	(1 << 3)
+#define DWC3_GSBUSCFG0_INCR8BRSTENA	(1 << 2)
+#define DWC3_GSBUSCFG0_INCR4BRSTENA	(1 << 1)
+#define DWC3_GSBUSCFG0_INCRBRSTENA	(1 << 0)
+#define DWC3_GSBUSCFG0_INCRBRSTMASK	0xff
+
 /* Global Debug Queue/FIFO Space Available Register */
 #define DWC3_GDBGFIFOSPACE_NUM(n)	((n) & 0x1f)
 #define DWC3_GDBGFIFOSPACE_TYPE(n)	(((n) << 5) & 0x1e0)
-- 
1.7.9.5