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Date:   Fri, 16 Dec 2016 09:50:04 +0100 (CET)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Andy Lutomirski <luto@...capital.net>
cc:     LKML <linux-kernel@...r.kernel.org>, X86 ML <x86@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Kyle Huey <khuey@...ehuey.com>,
        Andy Lutomirski <luto@...nel.org>
Subject: Re: [patch 3/3] x86/process: Optimize TIF_NOTSC switch

On Thu, 15 Dec 2016, Andy Lutomirski wrote:
> On Thu, Dec 15, 2016 at 8:44 AM, Thomas Gleixner <tglx@...utronix.de> wrote:
> > +static inline void cr4_toggle_bits(unsigned long mask)
> > +{
> > +       unsigned long cr4;
> > +
> > +       cr4 = this_cpu_read(cpu_tlbstate.cr4);
> > +       cr4 ^= mask;
> > +       this_cpu_write(cpu_tlbstate.cr4, cr4);
> > +       __write_cr4(cr4);
> > +}
> 
> This scares me for the same reason as BTF, although this should at
> least be less fragile.  But how about:

If that is fragile then all cr4 manipulation code is fragile because it
relies on cpu_tlbstate.cr4. The TIF flag and that per cpu thing are kept in
sync.

Thanks,

	tglx



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