linux-kernel - Re: [PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

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Date:   Thu, 5 Jan 2017 14:43:45 +0530
From:   Vivek Gautam <vivek.gautam@...eaurora.org>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     Stephen Boyd <sboyd@...eaurora.org>,
        "robh+dt" <robh+dt@...nel.org>, kishon <kishon@...com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Mark Rutland <mark.rutland@....com>,
        Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v3 4/4] phy: qcom-qmp: new qmp phy driver for qcom-chipsets

Hi,

On Wed, Jan 4, 2017 at 12:54 AM, Bjorn Andersson
<bjorn.andersson@...aro.org> wrote:
> On Wed 28 Dec 23:39 PST 2016, Vivek Gautam wrote:
>
>> >> + *
>> >> + */
>> >> +static int phy_pipe_clk_register(struct qcom_qmp_phy *qphy, int id)
>> >> +{
>> >> +     char clk_name[MAX_PROP_NAME];
>> >
>> > I'm not sure MAX_PROP_NAME is the same as some max clk name but
>> > ok. We should be able to calculate that the maximum is length of
>> > usb3_phy_pipe_clk_src for now though?
>>
>> Yea, i thought of using the same macro, considering that it provides
>> 32 characters :-)
>> Will rather use the length of usb3_phy_pipe_clk_src for now. May be
>> #define MAX_CLK_NAME   24
>>
>
> Using a macro indicates that the size have some global meaning, but as
> far as I can see it doesn't. Just write 24 and you will have enough
> space for 100k pcie pipe clocks. And then use sizeof(clk_name) below.

Sure, will do as suggested.

>
>> >
>> >> +     struct clk *clk;
>> >> +
>> >> +     memset(&clk_name, 0, sizeof(clk_name));
>
> There's no point in clearing clk_name, as it will be overwritten
> and null-terminated below.

Right. Will remove this.

>
>> >> +     switch (qphy->cfg->type) {
>> >> +     case PHY_TYPE_USB3:
>> >> +             snprintf(clk_name, MAX_PROP_NAME, "usb3_phy_pipe_clk_src");
>> >> +             break;
>> >> +     case PHY_TYPE_PCIE:
>> >> +             snprintf(clk_name, MAX_PROP_NAME, "pcie_%d_pipe_clk_src", id);
>> >> +             break;
>> >> +     default:
>> >> +             return -EINVAL;
>> >> +     }
>> >> +
>> >> +     /* controllers using QMP phys use 125MHz pipe clock interface */
>> >> +     clk = clk_register_fixed_rate(qphy->dev, clk_name, NULL, 0, 125000000);
>
> Regards,
> Bjorn
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Regards
Vivek
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