lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 13 Jan 2017 01:11:18 -0500
From:   Len Brown <lenb@...nel.org>
To:     x86@...nel.org
Cc:     linux-kernel@...r.kernel.org, Len Brown <len.brown@...el.com>
Subject: [PATCH] x86 tsc: Add the Intel Denverton Processor to native_calibrate_tsc()

From: Len Brown <len.brown@...el.com>

The Intel Denverton microserver uses a 25 MHz TSC crystal,
so we can derive its exact * TSC frequency
using CPUID and some arithmetic, eg.

TSC: 1800 MHz (25000000 Hz * 216 / 3 / 1000000)

* 'exact' is only as good as the crystal, which should be +/- 20ppm

Signed-off-by: Len Brown <len.brown@...el.com>
---
 arch/x86/kernel/tsc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 46b2f41f8b05..b3e397a0f29d 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -694,6 +694,7 @@ unsigned long native_calibrate_tsc(void)
 			crystal_khz = 24000;	/* 24.0 MHz */
 			break;
 		case INTEL_FAM6_SKYLAKE_X:
+		case INTEL_FAM6_ATOM_DENVERTON:
 			crystal_khz = 25000;	/* 25.0 MHz */
 			break;
 		case INTEL_FAM6_ATOM_GOLDMONT:
-- 
2.11.0.161.g6610af872

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ