linux-kernel - Re: [PATCHv2] ARM: dts: Add EMAC AXI settings for Arria10

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Thu, 2 Feb 2017 21:46:19 -0600
From:   Dinh Nguyen <dinh.linux@...il.com>
To:     thor.thayer@...ux.intel.com
Cc:     Dinh Nguyen <dinguyen@...nsource.altera.com>,
        dinh.nguyen@...ux.intel.com, Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Russell King <linux@...linux.org.uk>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Linux List <linux-kernel@...r.kernel.org>,
        matthew.gerlach@...ux.intel.com
Subject: Re: [PATCHv2] ARM: dts: Add EMAC AXI settings for Arria10

On Thu, Feb 2, 2017 at 4:05 PM,  <thor.thayer@...ux.intel.com> wrote:
> From: Thor Thayer <thor.thayer@...ux.intel.com>
>
> Add the device tree entries needed to support the EMAC AXI
> bus settings on the Arria10 SoCFPGA chip.
>
> Signed-off-by: Thor Thayer <thor.thayer@...ux.intel.com>
> ---
> v2 Add the AXI configuration to the other DW EMACs in the chip.
> ---
>  arch/arm/boot/dts/socfpga_arria10.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
>

Applied!

Thanks,
Dinh