linux-kernel - Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state" binding to OPP nodes

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Date:   Tue, 28 Feb 2017 09:52:05 -0600
From:   Rob Herring <robh@...nel.org>
To:     Ulf Hansson <ulf.hansson@...aro.org>
Cc:     Viresh Kumar <viresh.kumar@...aro.org>,
        Rafael Wysocki <rjw@...ysocki.net>,
        Kevin Hilman <khilman@...aro.org>,
        Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        "linaro-kernel@...ts.linaro.org" <linaro-kernel@...ts.linaro.org>,
        "linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Vincent Guittot <vincent.guittot@...aro.org>,
        Lina Iyer <lina.iyer@...aro.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH V3 2/7] PM / OPP: Introduce "domain-performance-state"
 binding to OPP nodes

On Tue, Feb 28, 2017 at 9:14 AM, Ulf Hansson <ulf.hansson@...aro.org> wrote:
> [...]
>
>>>                                     ---> Parent domain-2 (Contains Perfomance states)
>>>                                     |
>>>                                     |
>>> C.) DeviceX  --->  Parent-domain-1  |
>>>                                     |
>>>                                     |
>>>                                     ---> Parent domain-3 (Contains Perfomance states)
>>
>> I'm a bit confused. How does a domain have 2 parent domains?
>
> This comes from the early design of the generic PM domain, thus I
> assume we have some HW with such complex PM topology. However, I don't
> know if it is actually being used.
>
> Moreover, the corresponding DT bindings for "power-domains" parents,
> can easily be extended to cover more than one parent. See more in
> Documentation/devicetree/bindings/power/power_domain.txt

I could easily see device having 2 power domains. For example a cpu
may have separate domains for RAM/caches and logic. And nesting of
power domains is certainly common, but a power domain being contained
in 2 different parents? I don't even see how that is possible in the
physical design. Now if we're mixing PM and power domains again and
the cpu device is pointing to the cpu PM domain which contains 2 power
domains, then certainly that is possible.

Rob