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Date:   Thu, 2 Mar 2017 19:54:22 +0100
From:   Rafał Miłecki <zajec5@...il.com>
To:     Jon Mason <jon.mason@...adcom.com>,
        Hauke Mehrtens <hauke@...ke-m.de>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Florian Fainelli <f.fainelli@...il.com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org,
        bcm-kernel-feedback-list@...adcom.com,
        Jon Mason <jonmason@...adcom.com>
Subject: Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT

On 02/28/2017 09:31 PM, Jon Mason wrote:
> From: Jon Mason <jonmason@...adcom.com>
>
> Add support for the ARM TWD Watchdog to the bcm5301x device tree.  The
> ARM TWD timer allocated the register space for the WDT, so this patch
> necessitated shrinking that.  Also, the GIC masks were added for these.
>
> Signed-off-by: Jon Mason <jonmason@...adcom.com>
> ---
>  arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++---
>  1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
> index 4fbb089..3fbc450 100644
> --- a/arch/arm/boot/dts/bcm5301x.dtsi
> +++ b/arch/arm/boot/dts/bcm5301x.dtsi
> @@ -70,10 +70,19 @@
>  			clocks = <&periph_clk>;
>  		};
>
> -		local-timer@...00 {
> +		timer@...00 {
>  			compatible = "arm,cortex-a9-twd-timer";
> -			reg = <0x20600 0x100>;
> -			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> +			reg = <0x20600 0x20>;
> +			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
> +						  IRQ_TYPE_LEVEL_HIGH)>;
> +			clocks = <&periph_clk>;
> +		};

If you follow my recent e-mail thread:
BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13)
you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be
IRQ_TYPE_EDGE_RISING.

I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc stable
for kernels 4.8+.

The same change is needed for "arm,cortex-a9-global-timer".

Would you find time to revise this patch?

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