linux-kernel - Re: [PATCH V3 2/2] perf/x86: add sysfs entry to freeze counter on SMI

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Date:   Tue, 28 Mar 2017 10:42:13 +0200 (CEST)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Kan Liang <kan.liang@...el.com>
cc:     peterz@...radead.org, mingo@...hat.com,
        linux-kernel@...r.kernel.org, bp@...en8.de, acme@...nel.org,
        eranian@...gle.com, jolsa@...nel.org, ak@...ux.intel.com
Subject: Re: [PATCH V3 2/2] perf/x86: add sysfs entry to freeze counter on
 SMI

On Mon, 27 Mar 2017, kan.liang@...el.com wrote:
> +
> +	if (val)
> +		msr_set_bit_on_cpus(cpu_possible_mask, MSR_IA32_DEBUGCTLMSR, DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT);
> +	else
> +		msr_clear_bit_on_cpus(cpu_possible_mask, MSR_IA32_DEBUGCTLMSR, DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT);

This is still not protected against CPU hotplug. What's so hard about:

	get_online_cpus();

	if (val) {
		msr_set_bit_on_cpus(cpu_online_mask, MSR_IA32_DEBUGCTLMSR,
				    DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT);
	} else {
		msr_clear_bit_on_cpus(cpu_online_mask, MSR_IA32_DEBUGCTLMSR,
				      DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT);
	}

	put_online_cpus();

Aside of that, when this is set to SMI freeze, what causes a CPU which
comes online after that point to set the bit as well? Nothing AFAICT.

Thanks,

	tglx