linux-kernel - [tip:perf/core] drivers/iommu/amd: Clean up iommu_pc_get_set

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Date:   Thu, 30 Mar 2017 01:35:52 -0700
From:   tip-bot for Suravee Suthikulpanit <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     suravee.suthikulpanit@....com, mingo@...nel.org,
        vincent.weaver@...ne.edu, tglx@...utronix.de, jolsa@...hat.com,
        torvalds@...ux-foundation.org, alexander.shishkin@...ux.intel.com,
        joro@...tes.org, linux-kernel@...r.kernel.org, acme@...hat.com,
        peterz@...radead.org, hpa@...or.com, bp@...e.de, eranian@...gle.com
Subject: [tip:perf/core] drivers/iommu/amd: Clean up iommu_pc_get_set_reg()

Commit-ID:  0a6d80c70b9150d6a9cf466d41955e374c2c9fab
Gitweb:     http://git.kernel.org/tip/0a6d80c70b9150d6a9cf466d41955e374c2c9fab
Author:     Suravee Suthikulpanit <suravee.suthikulpanit@....com>
AuthorDate: Fri, 24 Feb 2017 02:48:16 -0600
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Thu, 30 Mar 2017 09:53:53 +0200

drivers/iommu/amd: Clean up iommu_pc_get_set_reg()

Clean up coding style and fix a bug in the 64-bit register read logic
since it overwrites the upper 32-bit when reading the lower 32-bit.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Jörg Rödel <joro@...tes.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Stephane Eranian <eranian@...gle.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Vince Weaver <vincent.weaver@...ne.edu>
Cc: iommu@...ts.linux-foundation.org
Link: http://lkml.kernel.org/r/1487926102-13073-5-git-send-email-Suravee.Suthikulpanit@amd.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 drivers/iommu/amd_iommu_init.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 6130278..ce65a47 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -2763,22 +2763,25 @@ static int iommu_pc_get_set_reg_val(struct amd_iommu *iommu,
 	if (WARN_ON((fxn > 0x28) || (fxn & 7)))
 		return -ENODEV;
 
-	offset = (u32)(((0x40|bank) << 12) | (cntr << 8) | fxn);
+	offset = (u32)(((0x40 | bank) << 12) | (cntr << 8) | fxn);
 
 	/* Limit the offset to the hw defined mmio region aperture */
-	max_offset_lim = (u32)(((0x40|iommu->max_banks) << 12) |
+	max_offset_lim = (u32)(((0x40 | iommu->max_banks) << 12) |
 				(iommu->max_counters << 8) | 0x28);
 	if ((offset < MMIO_CNTR_REG_OFFSET) ||
 	    (offset > max_offset_lim))
 		return -EINVAL;
 
 	if (is_write) {
-		writel((u32)*value, iommu->mmio_base + offset);
-		writel((*value >> 32), iommu->mmio_base + offset + 4);
+		u64 val = *value & GENMASK_ULL(47, 0);
+
+		writel((u32)val, iommu->mmio_base + offset);
+		writel((val >> 32), iommu->mmio_base + offset + 4);
 	} else {
 		*value = readl(iommu->mmio_base + offset + 4);
 		*value <<= 32;
-		*value = readl(iommu->mmio_base + offset);
+		*value |= readl(iommu->mmio_base + offset);
+		*value &= GENMASK_ULL(47, 0);
 	}
 
 	return 0;