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Date: Tue, 4 Apr 2017 22:48:43 -0700
From: tip-bot for Andi Kleen <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: hpa@...or.com, tglx@...utronix.de, linux-kernel@...r.kernel.org,
mingo@...nel.org, ak@...ux.intel.com
Subject: [tip:perf/core] perf vendor events intel: Add uncore events for
Broadwell client
Commit-ID: 092a95d41655bdd31d7d28f1788818724505feb2
Gitweb: http://git.kernel.org/tip/092a95d41655bdd31d7d28f1788818724505feb2
Author: Andi Kleen <ak@...ux.intel.com>
AuthorDate: Wed, 29 Mar 2017 17:17:42 -0700
Committer: Andi Kleen <ak@...ux.intel.com>
CommitDate: Thu, 30 Mar 2017 13:35:23 -0700
perf vendor events intel: Add uncore events for Broadwell client
Add V18 of Broadwell uncore events
Cc: jolsa@...nel.org
Link: http://lkml.kernel.org/n/tip-xlbguqdzho7l3qn7di40a7av@git.kernel.org
Signed-off-by: Andi Kleen <ak@...ux.intel.com>
---
.../arch/x86/{haswell => broadwell}/uncore.json | 190 +++++----------------
1 file changed, 47 insertions(+), 143 deletions(-)
diff --git a/tools/perf/pmu-events/arch/x86/haswell/uncore.json b/tools/perf/pmu-events/arch/x86/broadwell/uncore.json
similarity index 63%
copy from tools/perf/pmu-events/arch/x86/haswell/uncore.json
copy to tools/perf/pmu-events/arch/x86/broadwell/uncore.json
index 3ef5c21..28e1e15 100644
--- a/tools/perf/pmu-events/arch/x86/haswell/uncore.json
+++ b/tools/perf/pmu-events/arch/x86/broadwell/uncore.json
@@ -2,18 +2,6 @@
{
"Unit": "CBO",
"EventCode": "0x22",
- "UMask": "0x21",
- "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EXTERNAL",
- "BriefDescription": "An external snoop misses in some processor core.",
- "PublicDescription": "An external snoop misses in some processor core.",
- "Counter": "0,1",
- "CounterMask": "0",
- "Invert": "0",
- "EdgeDetect": "0"
- },
- {
- "Unit": "CBO",
- "EventCode": "0x22",
"UMask": "0x41",
"EventName": "UNC_CBO_XSNP_RESPONSE.MISS_XCORE",
"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which misses in some processor core.",
@@ -38,18 +26,6 @@
{
"Unit": "CBO",
"EventCode": "0x22",
- "UMask": "0x24",
- "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_EXTERNAL",
- "BriefDescription": "An external snoop hits a non-modified line in some processor core.",
- "PublicDescription": "An external snoop hits a non-modified line in some processor core.",
- "Counter": "0,1",
- "CounterMask": "0",
- "Invert": "0",
- "EdgeDetect": "0"
- },
- {
- "Unit": "CBO",
- "EventCode": "0x22",
"UMask": "0x44",
"EventName": "UNC_CBO_XSNP_RESPONSE.HIT_XCORE",
"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a non-modified line in some processor core.",
@@ -62,30 +38,6 @@
{
"Unit": "CBO",
"EventCode": "0x22",
- "UMask": "0x84",
- "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_EVICTION",
- "BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core.",
- "PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core.",
- "Counter": "0,1",
- "CounterMask": "0",
- "Invert": "0",
- "EdgeDetect": "0"
- },
- {
- "Unit": "CBO",
- "EventCode": "0x22",
- "UMask": "0x28",
- "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_EXTERNAL",
- "BriefDescription": "An external snoop hits a modified line in some processor core.",
- "PublicDescription": "An external snoop hits a modified line in some processor core.",
- "Counter": "0,1",
- "CounterMask": "0",
- "Invert": "0",
- "EdgeDetect": "0"
- },
- {
- "Unit": "CBO",
- "EventCode": "0x22",
"UMask": "0x48",
"EventName": "UNC_CBO_XSNP_RESPONSE.HITM_XCORE",
"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a modified line in some processor core.",
@@ -97,22 +49,10 @@
},
{
"Unit": "CBO",
- "EventCode": "0x22",
- "UMask": "0x88",
- "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_EVICTION",
- "BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core.",
- "PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core.",
- "Counter": "0,1",
- "CounterMask": "0",
- "Invert": "0",
- "EdgeDetect": "0"
- },
- {
- "Unit": "CBO",
"EventCode": "0x34",
"UMask": "0x11",
"EventName": "UNC_CBO_CACHE_LOOKUP.READ_M",
- "BriefDescription": "L3 Lookup read request that access cache and found line in M-state.",
+ "BriefDescription": "L3 Lookup read request that access cache and found line in M-state",
"PublicDescription": "L3 Lookup read request that access cache and found line in M-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -124,7 +64,7 @@
"EventCode": "0x34",
"UMask": "0x21",
"EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_M",
- "BriefDescription": "L3 Lookup write request that access cache and found line in M-state.",
+ "BriefDescription": "L3 Lookup write request that access cache and found line in M-state",
"PublicDescription": "L3 Lookup write request that access cache and found line in M-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -134,21 +74,9 @@
{
"Unit": "CBO",
"EventCode": "0x34",
- "UMask": "0x41",
- "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_M",
- "BriefDescription": "L3 Lookup external snoop request that access cache and found line in M-state.",
- "PublicDescription": "L3 Lookup external snoop request that access cache and found line in M-state.",
- "Counter": "0,1",
- "CounterMask": "0",
- "Invert": "0",
- "EdgeDetect": "0"
- },
- {
- "Unit": "CBO",
- "EventCode": "0x34",
"UMask": "0x81",
"EventName": "UNC_CBO_CACHE_LOOKUP.ANY_M",
- "BriefDescription": "L3 Lookup any request that access cache and found line in M-state.",
+ "BriefDescription": "L3 Lookup any request that access cache and found line in M-state",
"PublicDescription": "L3 Lookup any request that access cache and found line in M-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -160,7 +88,7 @@
"EventCode": "0x34",
"UMask": "0x18",
"EventName": "UNC_CBO_CACHE_LOOKUP.READ_I",
- "BriefDescription": "L3 Lookup read request that access cache and found line in I-state.",
+ "BriefDescription": "L3 Lookup read request that access cache and found line in I-state",
"PublicDescription": "L3 Lookup read request that access cache and found line in I-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -170,33 +98,9 @@
{
"Unit": "CBO",
"EventCode": "0x34",
- "UMask": "0x28",
- "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_I",
- "BriefDescription": "L3 Lookup write request that access cache and found line in I-state.",
- "PublicDescription": "L3 Lookup write request that access cache and found line in I-state.",
- "Counter": "0,1",
- "CounterMask": "0",
- "Invert": "0",
- "EdgeDetect": "0"
- },
- {
- "Unit": "CBO",
- "EventCode": "0x34",
- "UMask": "0x48",
- "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_I",
- "BriefDescription": "L3 Lookup external snoop request that access cache and found line in I-state.",
- "PublicDescription": "L3 Lookup external snoop request that access cache and found line in I-state.",
- "Counter": "0,1",
- "CounterMask": "0",
- "Invert": "0",
- "EdgeDetect": "0"
- },
- {
- "Unit": "CBO",
- "EventCode": "0x34",
"UMask": "0x88",
"EventName": "UNC_CBO_CACHE_LOOKUP.ANY_I",
- "BriefDescription": "L3 Lookup any request that access cache and found line in I-state.",
+ "BriefDescription": "L3 Lookup any request that access cache and found line in I-state",
"PublicDescription": "L3 Lookup any request that access cache and found line in I-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -208,7 +112,7 @@
"EventCode": "0x34",
"UMask": "0x1f",
"EventName": "UNC_CBO_CACHE_LOOKUP.READ_MESI",
- "BriefDescription": "L3 Lookup read request that access cache and found line in any MESI-state.",
+ "BriefDescription": "L3 Lookup read request that access cache and found line in any MESI-state",
"PublicDescription": "L3 Lookup read request that access cache and found line in any MESI-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -220,7 +124,7 @@
"EventCode": "0x34",
"UMask": "0x2f",
"EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_MESI",
- "BriefDescription": "L3 Lookup write request that access cache and found line in MESI-state.",
+ "BriefDescription": "L3 Lookup write request that access cache and found line in MESI-state",
"PublicDescription": "L3 Lookup write request that access cache and found line in MESI-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -230,21 +134,9 @@
{
"Unit": "CBO",
"EventCode": "0x34",
- "UMask": "0x4f",
- "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_MESI",
- "BriefDescription": "L3 Lookup external snoop request that access cache and found line in MESI-state.",
- "PublicDescription": "L3 Lookup external snoop request that access cache and found line in MESI-state.",
- "Counter": "0,1",
- "CounterMask": "0",
- "Invert": "0",
- "EdgeDetect": "0"
- },
- {
- "Unit": "CBO",
- "EventCode": "0x34",
"UMask": "0x8f",
"EventName": "UNC_CBO_CACHE_LOOKUP.ANY_MESI",
- "BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state.",
+ "BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state",
"PublicDescription": "L3 Lookup any request that access cache and found line in MESI-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -256,7 +148,7 @@
"EventCode": "0x34",
"UMask": "0x86",
"EventName": "UNC_CBO_CACHE_LOOKUP.ANY_ES",
- "BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state.",
+ "BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state",
"PublicDescription": "L3 Lookup any request that access cache and found line in E or S-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -266,21 +158,9 @@
{
"Unit": "CBO",
"EventCode": "0x34",
- "UMask": "0x46",
- "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_ES",
- "BriefDescription": "L3 Lookup external snoop request that access cache and found line in E or S-state.",
- "PublicDescription": "L3 Lookup external snoop request that access cache and found line in E or S-state.",
- "Counter": "0,1",
- "CounterMask": "0",
- "Invert": "0",
- "EdgeDetect": "0"
- },
- {
- "Unit": "CBO",
- "EventCode": "0x34",
"UMask": "0x16",
"EventName": "UNC_CBO_CACHE_LOOKUP.READ_ES",
- "BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state.",
+ "BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state",
"PublicDescription": "L3 Lookup read request that access cache and found line in E or S-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -292,7 +172,7 @@
"EventCode": "0x34",
"UMask": "0x26",
"EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_ES",
- "BriefDescription": "L3 Lookup write request that access cache and found line in E or S-state.",
+ "BriefDescription": "L3 Lookup write request that access cache and found line in E or S-state",
"PublicDescription": "L3 Lookup write request that access cache and found line in E or S-state.",
"Counter": "0,1",
"CounterMask": "0",
@@ -306,7 +186,19 @@
"EventName": "UNC_ARB_TRK_OCCUPANCY.ALL",
"BriefDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is defined as valid from it's allocation till first of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-coherent traffic.",
"PublicDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is defined as valid from it's allocation till first of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-coherent traffic.",
- "Counter": "0",
+ "Counter": "0,",
+ "CounterMask": "0",
+ "Invert": "0",
+ "EdgeDetect": "0"
+ },
+ {
+ "Unit": "iMPH-U",
+ "EventCode": "0x80",
+ "UMask": "0x02",
+ "EventName": "UNC_ARB_TRK_OCCUPANCY.DRD_DIRECT",
+ "BriefDescription": "Each cycle count number of 'valid' coherent Data Read entries that are in DirectData mode. Such entry is defined as valid when it is allocated till data sent to Core (first chunk, IDI0). Applicable for IA Cores' requests in normal case.",
+ "PublicDescription": "Each cycle count number of 'valid' coherent Data Read entries that are in DirectData mode. Such entry is defined as valid when it is allocated till data sent to Core (first chunk, IDI0). Applicable for IA Cores' requests in normal case.",
+ "Counter": "0,",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
@@ -326,10 +218,10 @@
{
"Unit": "iMPH-U",
"EventCode": "0x81",
- "UMask": "0x20",
- "EventName": "UNC_ARB_TRK_REQUESTS.WRITES",
- "BriefDescription": "Number of Writes allocated - any write transactions: full/partials writes and evictions.",
- "PublicDescription": "Number of Writes allocated - any write transactions: full/partials writes and evictions.",
+ "UMask": "0x02",
+ "EventName": "UNC_ARB_TRK_REQUESTS.DRD_DIRECT",
+ "BriefDescription": "Number of Core coherent Data Read entries allocated in DirectData mode",
+ "PublicDescription": "Number of Core coherent Data Read entries allocated in DirectData mode.",
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
@@ -337,12 +229,12 @@
},
{
"Unit": "iMPH-U",
- "EventCode": "0x83",
- "UMask": "0x01",
- "EventName": "UNC_ARB_COH_TRK_OCCUPANCY.All",
- "BriefDescription": "Each cycle count number of valid entries in Coherency Tracker queue from allocation till deallocation. Aperture requests (snoops) appear as NC decoded internally and become coherent (snoop L3, access memory)",
- "PublicDescription": "Each cycle count number of valid entries in Coherency Tracker queue from allocation till deallocation. Aperture requests (snoops) appear as NC decoded internally and become coherent (snoop L3, access memory).",
- "Counter": "0",
+ "EventCode": "0x81",
+ "UMask": "0x20",
+ "EventName": "UNC_ARB_TRK_REQUESTS.WRITES",
+ "BriefDescription": "Number of Writes allocated - any write transactions: full/partials writes and evictions.",
+ "PublicDescription": "Number of Writes allocated - any write transactions: full/partials writes and evictions.",
+ "Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
@@ -360,11 +252,23 @@
"EdgeDetect": "0"
},
{
+ "Unit": "iMPH-U",
+ "EventCode": "0x80",
+ "UMask": "0x01",
+ "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST",
+ "BriefDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.;",
+ "PublicDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.",
+ "Counter": "0,",
+ "CounterMask": "1",
+ "Invert": "0",
+ "EdgeDetect": "0"
+ },
+ {
"Unit": "NCU",
"EventCode": "0x0",
"UMask": "0x01",
"EventName": "UNC_CLOCK.SOCKET",
- "BriefDescription": "This 48-bit fixed counter counts the UCLK cycles.",
+ "BriefDescription": "This 48-bit fixed counter counts the UCLK cycles",
"PublicDescription": "This 48-bit fixed counter counts the UCLK cycles.",
"Counter": "FIXED",
"CounterMask": "0",
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