linux-kernel - Re: [PATCH 2/3] mfd: cpcap: Use ack

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Date:   Tue, 11 Apr 2017 10:54:56 +0100
From:   Lee Jones <lee.jones@...aro.org>
To:     Tony Lindgren <tony@...mide.com>
Cc:     Samuel Ortiz <sameo@...ux.intel.com>, linux-kernel@...r.kernel.org,
        linux-omap@...r.kernel.org,
        Charles Keepax <ckeepax@...nsource.wolfsonmicro.com>,
        Marcel Partap <mpartap@....net>,
        Michael Scott <michael.scott@...aro.org>
Subject: Re: [PATCH 2/3] mfd: cpcap: Use ack_invert interrupts

On Mon, 03 Apr 2017, Tony Lindgren wrote:

> We should use ack_invert as the int_read_and_clear() in the Motorola
> kernel tree does "ireg_val & ~mreg_val" before writing to the mask
> register.
> 
> Fixes: 56e1d40d3bea ("mfd: cpcap: Add minimal support")
> Cc: Charles Keepax <ckeepax@...nsource.wolfsonmicro.com>
> Cc: Marcel Partap <mpartap@....net>
> Cc: Michael Scott <michael.scott@...aro.org>
> Tested-by: Sebastian Reichel <sre@...nel.org>
> Signed-off-by: Tony Lindgren <tony@...mide.com>
> ---
>  drivers/mfd/motorola-cpcap.c | 3 +++
>  1 file changed, 3 insertions(+)

Applied, thanks.

> diff --git a/drivers/mfd/motorola-cpcap.c b/drivers/mfd/motorola-cpcap.c
> --- a/drivers/mfd/motorola-cpcap.c
> +++ b/drivers/mfd/motorola-cpcap.c
> @@ -71,6 +71,7 @@ static struct regmap_irq_chip cpcap_irq_chip[CPCAP_NR_IRQ_CHIPS] = {
>  		.ack_base = CPCAP_REG_MI1,
>  		.mask_base = CPCAP_REG_MIM1,
>  		.use_ack = true,
> +		.ack_invert = true,
>  	},
>  	{
>  		.name = "cpcap-m2",
> @@ -79,6 +80,7 @@ static struct regmap_irq_chip cpcap_irq_chip[CPCAP_NR_IRQ_CHIPS] = {
>  		.ack_base = CPCAP_REG_MI2,
>  		.mask_base = CPCAP_REG_MIM2,
>  		.use_ack = true,
> +		.ack_invert = true,
>  	},
>  	{
>  		.name = "cpcap1-4",
> @@ -88,6 +90,7 @@ static struct regmap_irq_chip cpcap_irq_chip[CPCAP_NR_IRQ_CHIPS] = {
>  		.mask_base = CPCAP_REG_INTM1,
>  		.type_base = CPCAP_REG_INTS1,
>  		.use_ack = true,
> +		.ack_invert = true,
>  	},
>  };
>  

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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