lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 26 Apr 2017 14:21:34 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Jacopo Mondi <jacopo+renesas@...ndi.org>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Chris Brandt <chris.brandt@...esas.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Russell King <linux@...linux.org.uk>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 2/9] pinctrl: Renesas RZ/A1 pin and gpio controller

Hi Jacopo,

On Wed, Apr 5, 2017 at 4:07 PM, Jacopo Mondi <jacopo+renesas@...ndi.org> wrote:
> Add combined gpio and pin controller driver for Renesas RZ/A1
> r7s72100 SoC.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@...ndi.org>

> --- /dev/null
> +++ b/drivers/pinctrl/pinctrl-rza1.c

> +/*
> + * Keep this up-to-date with pinconf-generic.h: it performs packing of
> + * pin conf flags and argument during pinconf_generic_parse_dt_config();
> + * we simply discard pinconf argument here
> + */
> +#define PIN_CONF_UNPACK(pinconf)       ((pinconf) & 0xffUL)

Perhaps this should be moved to pinconf-generic.h, to make sure it stays
up-to-date?

> +static inline int rza1_get_bit(struct rza1_port *port, unsigned int reg,

I'd use "unsigned int" as the return type.
It doesn't matter much as register values are 16-bit, but people might copy
from this driver when writing their own.

> +                              unsigned int bit)
> +{
> +       void __iomem *mem = RZA1_ADDR(port->base, reg, port->id);
> +
> +       return ioread16(mem) & BIT(bit);
> +}

> +static inline int rza1_pin_get_direction(struct rza1_port *port,
> +                                        unsigned int pin)
> +{
> +       unsigned long irqflags;
> +       int input;
> +
> +       spin_lock_irqsave(&port->lock, irqflags);
> +       input = rza1_get_bit(port, RZA1_PM_REG, pin);
> +       spin_unlock_irqrestore(&port->lock, irqflags);
> +
> +       return input;

return !!input;

gpio_chip.get_direction() should return 0, 1, or a negative error value.

> +}

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ