lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Tue, 23 May 2017 09:11:02 +0800 From: Elaine Zhang <zhangqing@...k-chips.com> To: heiko@...ech.de, xf@...k-chips.com Cc: linux-clk@...r.kernel.org, huangtao@...k-chips.com, xxx@...k-chips.com, cl@...k-chips.com, linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, robh+dt@...nel.org, mark.rutland@....com, mturquette@...libre.com, sboyd@...eaurora.org, zhengxing@...k-chips.com, Elaine Zhang <zhangqing@...k-chips.com> Subject: [PATCH v3 0/3] clk: rockchip: support clk controller for RK3128 SoC The driver and clk ID\SRST ID it's also applies to the RK3126 SoC. change in V3: export clk ID for usb480m and usb480m_phy change in V2: rename the rk312x to rk3128. Elaine Zhang (3): clk: rockchip: add dt-binding header for rk3128 dt-bindings: add bindings for rk3128 clock controller clk: rockchip: add clock controller for rk3128 .../bindings/clock/rockchip,rk3128-cru.txt | 56 ++ drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk-rk3128.c | 612 +++++++++++++++++++++ include/dt-bindings/clock/rk3128-cru.h | 283 ++++++++++ 4 files changed, 952 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt create mode 100644 drivers/clk/rockchip/clk-rk3128.c create mode 100644 include/dt-bindings/clock/rk3128-cru.h -- 1.9.1
Powered by blists - more mailing lists