linux-kernel - Re: [PATCH v4 6/7] ARM: NOMMU: Set ARM_DMA_MEM

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 24 May 2017 09:31:54 +0100
From:   Vladimir Murzin <vladimir.murzin@....com>
To:     Arnd Bergmann <arnd@...db.de>,
        Russell King - ARM Linux <linux@...linux.org.uk>
Cc:     Linux ARM <linux-arm-kernel@...ts.infradead.org>, sza@....hu,
        Robin Murphy <robin.murphy@....com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Andrew Morton <akpm@...ux-foundation.org>, kbuild-all@...org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        gregkh <gregkh@...uxfoundation.org>
Subject: Re: [PATCH v4 6/7] ARM: NOMMU: Set ARM_DMA_MEM_BUFFERABLE for M-class
 cpus

On 23/05/17 21:33, Arnd Bergmann wrote:
> On Tue, May 23, 2017 at 10:01 PM, Russell King - ARM Linux
> <linux@...linux.org.uk> wrote:
>> On Mon, Apr 24, 2017 at 11:16:56AM +0100, Vladimir Murzin wrote:
>>> Now, we have dedicated non-cacheable region for consistent DMA
>>> operations. However, that region can still be marked as bufferable by
>>> MPU, so it'd be safer to have barriers by default.
>>
>> What do you actually want here?  Your patch doesn't quite make sense,
>> the commit description seems to indicate that you require this option
>> to be set for V7M, but the patch says otherwise.
>>
>>>  config ARM_DMA_MEM_BUFFERABLE
>>> -     bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K) && !CPU_V7
>>> -     default y if CPU_V6 || CPU_V6K || CPU_V7
>>> +     bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K || CPU_V7M) && !CPU_V7
>>
>> This "if" conditional conditionalises the visibility of the option,
>> it doesn't conditionalise the value.
>>
>>> +     default y if CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M
>>
>> Taking both of these changes together what you end up with is an option
>> presented to the user for "Use non-cacheable memory for DMA" which
>> they can choose to disable.
>>
>> If you require this option to be set, that's incorrect - your modification
>> to the default line is correct, but the first line is not.  To achieve
>> that, you want the if condition to evaluate false for V7M, thereby hiding
>> the option from the user.  In that case, the default value will always be
>> assigned to the option.
> 
> I had the opposite comment in the previous version ;-)
> https://lkml.org/lkml/2017/4/19/185
> 
> I think the current patch is correct, but the description could still be
> clarified: On some of the beefier ARMv7-M machines (with DMA
> and write buffers) we want this enabled, while those that didn't
> need it until now also won't need it in the future.

Ok. Do you want it go into commit message or option description or maybe both?

Thanks
Vladimir

> 
>         Arnd
>