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Date:   Tue, 13 Jun 2017 15:11:27 +0100
From:   Jose Abreu <Jose.Abreu@...opsys.com>
To:     Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Jose Abreu <Jose.Abreu@...opsys.com>
CC:     Mark Yao <mark.yao@...k-chips.com>,
        <dri-devel@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>,
        Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
        Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>,
        Archit Taneja <architt@...eaurora.org>,
        Andrzej Hajda <a.hajda@...sung.com>,
        "Carlos Palminha" <CARLOS.PALMINHA@...opsys.com>
Subject: Re: [PATCH] drm: bridge: synopsys/dw-hdmi: Provide default
 configuration function for HDMI 2.0 PHY

Hi Laurent,


Sorry for the late reply!


On 10-06-2017 09:50, Laurent Pinchart wrote:
> Hi Jose,
>
> On Friday 09 Jun 2017 13:53:12 Jose Abreu wrote:
>> On 09-06-2017 12:04, Jose Abreu wrote:
>>> Currently HDMI 2.0 PHYs do not have a default configuration function.
>>>
>>> As these PHYs have the same register layout as the 3D PHYs we can
>>> safely use the default configuration function.
>> I may have been a little to fast arriving at this conclusion. I
>> mean most of the registers match but in the configuration
>> function there are registers that do not match. Did you actually
>> test this configuration function with an HDMI 2.0 phy? And did
>> you test with different video modes? From my experience the phy
>> may be wrongly configured and sometimes work anyway.
>>
>> Do please retest with as many video modes as you can and give me
>> your phy ID (read from controller config reg HDMI_CONFIG2_ID).
> The Renesas R-Car Gen3 HDMI PHY reports an DWC HDMI 2.0 TX PHY ID, but has a 
> configuration function (rcar_hdmi_phy_configure() in drivers/gpu/drm/rcar-
> du/rcar_dw_hdmi.c) that doesn't match hdmi_phy_configure_dwc_hdmi_3d_tx(). 
> From the information I have been given the layout of the configuration 
> registers haven't been changed by Renesas. I know we've briefly discussed this 
> in the past, but I'd appreciate if you could have a second look and tell me 
> what you think.

Yup, yours seems correct. Though at the time you submitted I
found it odd that only 3 registers needed to be written whilst
for HDMI 2.0 phys I have here 6 registers, but you said it is
working so I though your phy was different ...

Even so, one thing I would like to know is what was the max
resolution you tested? I see you have clock values up to 297MHz,
so 4k@...z? If I send a patch with a general config function for
HDMI 2.0 phys can you test it on your platform?

Best regards,
Jose Miguel Abreu

>
>>>  If, for some reason,
>>>
>>> the PHY is custom this change will not make any impact because
>>> in configuration function we prefer the pdata provided configuration
>>> function over the internal one.
>>>
>>> This patch is based on today's drm-misc-next branch.
>>>
>>> Signed-off-by: Jose Abreu <joabreu@...opsys.com>
>>> Cc: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
>>> Cc: Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>
>>> Cc: Archit Taneja <architt@...eaurora.org>
>>> Cc: Andrzej Hajda <a.hajda@...sung.com>
>>> Cc: Mark Yao <mark.yao@...k-chips.com>
>>> Cc: Carlos Palminha <palminha@...opsys.com>
>>> ---
>>>
>>>  drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
>>> b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c index ead1124..10c8d8c 100644
>>> --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
>>> +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
>>> @@ -2170,6 +2170,7 @@ static irqreturn_t dw_hdmi_irq(int irq, void
>>> *dev_id)
>>>  		.name = "DWC HDMI 2.0 TX PHY",
>>>  		.gen = 2,
>>>  		.has_svsret = true,
>>> +		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
>>>  	}, {
>>>  		.type = DW_HDMI_PHY_VENDOR_PHY,
>>>  		.name = "Vendor PHY",

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