lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 15 Jun 2017 10:40:16 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Janakarajan Natarajan <Janakarajan.Natarajan@....com>
Cc:     linux-kernel@...r.kernel.org,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Subject: Re: [PATCH v4 2/2] amd: uncore: Get correct number of cores sharing
 last level cache

On Wed, Jun 14, 2017 at 11:26:58AM -0500, Janakarajan Natarajan wrote:
> In Family 17h, the number of cores sharing a cache level is obtained
> from the Cache Properties CPUID leaf (0x8000001d) by passing in the
> cache level in ECX. In prior families, a cache level of 2 was used to
> determine this information.
> 
> To get the right information, irrespective of Family, iterate over
> the cache levels using CPUID 0x8000001d. The last level cache is the
> last value to return a non-zero value in EAX.
> 
> Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@....com>
> ---
>  arch/x86/events/amd/uncore.c | 19 ++++++++++++++++---
>  1 file changed, 16 insertions(+), 3 deletions(-)

Reviewed-by: Borislav Petkov <bp@...e.de>

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ