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Message-ID: <20170811081920.GB25147@Red>
Date:   Fri, 11 Aug 2017 10:19:20 +0200
From:   Corentin Labbe <clabbe.montjoie@...il.com>
To:     Chen-Yu Tsai <wens@...e.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Russell King <linux@...linux.org.uk>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        alexandre.torgue@...com, Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        netdev <netdev@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 2/3] ARM: sun8i: sunxi-h3-h5: add phy-is-integrated
 property to internal PHY

On Fri, Aug 11, 2017 at 04:11:13PM +0800, Chen-Yu Tsai wrote:
> On Fri, Aug 11, 2017 at 4:05 PM, Corentin Labbe
> <clabbe.montjoie@...il.com> wrote:
> > On Fri, Aug 11, 2017 at 10:42:51AM +0800, Chen-Yu Tsai wrote:
> >> Hi,
> >>
> >> On Thu, Aug 10, 2017 at 4:51 PM, Corentin Labbe
> >> <clabbe.montjoie@...il.com> wrote:
> >> > This patch add the new phy-is-integrated property to the internal PHY
> >> > node.
> >> >
> >> > Signed-off-by: Corentin Labbe <clabbe.montjoie@...il.com>
> >> > ---
> >> >  arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 +
> >> >  1 file changed, 1 insertion(+)
> >> >
> >> > diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> >> > index 4b599b5d26f6..54fc24e4c569 100644
> >> > --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> >> > +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> >> > @@ -425,6 +425,7 @@
> >> >                                         reg = <1>;
> >> >                                         clocks = <&ccu CLK_BUS_EPHY>;
> >> >                                         resets = <&ccu RST_BUS_EPHY>;
> >> > +                                       phy-is-integrated;
> >>
> >> You also need to "delete" this property at the board level for
> >> any board that has the external PHY at address <1>. Otherwise
> >> they will stop working. This is due to the internal and external
> >> PHYs having the same path and node name in the device tree, so
> >> they are effectively the same node.
> >>
> >> ChenYu
> >>
> >
> > They have not the same name, ext_rgmii_phy vs int_mii_phy.
> 
> That is just the label. The label plays no part in device tree merging. The path
> 
>     /soc/ethernet@...0000/mdio/ethernet-phy@1
> 
> is the same. You can look under
> 
>     /proc/device-tree/soc/ethernet@...0000/mdio
> 
> on the OrangePI Plus 2E or any other H3 board that uses an
> external PHY at address 1.
> 
> ChenYu

Since we get the phy node by phy-handle and not by path, I think all should be good.

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