linux-kernel - Re: [PATCH v2 1/2] ARM: dts: sun7i: Fix A20-OLinuXino-MICRO dts for LAN8710

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Date:   Fri, 1 Sep 2017 15:06:56 +0200
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     Stefan Mavrodiev <stefan.mavrodiev@...il.com>
Cc:     Stefan Mavrodiev <stefan@...mex.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Russell King <linux@...linux.org.uk>,
        Chen-Yu Tsai <wens@...e.org>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-sunxi@...glegroups.com
Subject: Re: [PATCH v2 1/2] ARM: dts: sun7i: Fix A20-OLinuXino-MICRO dts for
 LAN8710

On Thu, Aug 31, 2017 at 08:20:18AM +0300, Stefan Mavrodiev wrote:
> > >  From revision J the board uses new phy chip LAN8710. Compared
> > > with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
> > > not to work. To fix this PA17 is muxed with GMAC function. This
> > > makes the pin output-low.
> > > 
> > > This patch is compatible with earlier board revisions, since this
> > > pin wasn't connected to phy.
> > > 
> > > Signed-off-by: Stefan Mavrodiev <stefan@...mex.com>
> > > ---
> > >   arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
> > >   1 file changed, 6 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> > > index 0b7403e..cb1b081 100644
> > > --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> > > +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> > > @@ -102,7 +102,7 @@
> > >   &gmac {
> > >   	pinctrl-names = "default";
> > > -	pinctrl-0 = <&gmac_pins_mii_a>;
> > > +	pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
> > >   	phy = <&phy1>;
> > >   	phy-mode = "mii";
> > >   	status = "okay";
> > > @@ -229,6 +229,11 @@
> > >   };
> > >   &pio {
> > > +	gmac_txerr: gmac_txerr@0 {
> > > +		pins = "PA17";
> > > +		function = "gmac";
> > > +	};
> > > +
> > The patch looks fine, I still have one question though.
> > 
> > Can a PHY operate without this signal? My real question is, would it
> > make sense to mux that pin for all the users, or is it an optional
> > signal that each board designer can choose to use or not?
> > 
> > Thanks!
> > Maxime
>
> This phy (LAN8710) cannot work without this pin. Part of the problem
> is in that we've replaced without paying attention to this signal.
> 
> RTL8201 has no TXERR pin. The pin PA17 is used as reset signal and
> therefore is pulled up with resistor. However on old revisions this
> option (there is jumper pad between SOC and PHY).
> 
> As I said, LAN8710 cannot work without this signal. In the datasheet
> is written:
>
> 	...
> 	The controller drives TXER high when a transmit error is detected.
> 	...
> 
> In the current variant of the dts, all data is threated as error.

Sorry if my question was unclear, I meant to ask for all PHYs
connected to an A20. I got that you were needing it for that
particular one :)

> So to answer you question. This is feature only on our board and
> highly depends on the chosen PHY.  I don't think this should be
> muxed for all users.

Ok, I guess it answers it. Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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