linux-kernel - [tip:x86/urgent] perf/x86/intel/cstate: Add missing CPU IDs

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Date:   Mon, 25 Sep 2017 03:08:55 -0700
From:   tip-bot for Kan Liang <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     mingo@...nel.org, tglx@...utronix.de, Kan.liang@...el.com,
        hpa@...or.com, linux-kernel@...r.kernel.org
Subject: [tip:x86/urgent] perf/x86/intel/cstate: Add missing CPU IDs

Commit-ID:  b09c146f8f63c0e03adba74df76bf9c2be466fec
Gitweb:     http://git.kernel.org/tip/b09c146f8f63c0e03adba74df76bf9c2be466fec
Author:     Kan Liang <Kan.liang@...el.com>
AuthorDate: Fri, 8 Sep 2017 17:34:47 -0400
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Mon, 25 Sep 2017 09:36:17 +0200

perf/x86/intel/cstate: Add missing CPU IDs

Skylake server uses the same C-state residency events as Sandy Bridge.

Denverton and Gemini lake use the same C-state residency events as
Apollo Lake.

Signed-off-by: Kan Liang <Kan.liang@...el.com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Cc: ak@...ux.intel.com
Cc: peterz@...radead.org
Cc: piotr.luc@...el.com
Cc: harry.pan@...el.com
Cc: srinivas.pandruvada@...ux.intel.com
Link: http://lkml.kernel.org/r/20170908213449.6224-1-kan.liang@intel.com

---
 arch/x86/events/intel/cstate.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 4cf100f..72db066 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -552,6 +552,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
 
 	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_MOBILE,  snb_cstates),
 	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_DESKTOP, snb_cstates),
+	X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_X, snb_cstates),
 
 	X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_MOBILE,  snb_cstates),
 	X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_DESKTOP, snb_cstates),
@@ -560,6 +561,9 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
 	X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNM, knl_cstates),
 
 	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT, glm_cstates),
+	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_DENVERTON, glm_cstates),
+
+	X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GEMINI_LAKE, glm_cstates),
 	{ },
 };
 MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);