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Date:   Wed, 27 Sep 2017 13:55:15 +1300
From:   Kalyan Kinthada <kalyan.kinthada@...iedtelesis.co.nz>
To:     dwmw2@...radead.org, computersforpeace@...il.com,
        boris.brezillon@...e-electrons.com, marek.vasut@...il.com,
        richard@....at, cyrille.pitchen@...ev4u.fr, robh+dt@...nel.org,
        mark.rutland@....com, ezequiel.garcia@...e-electrons.com,
        miquel.raynal@...e-electrons.com, devicetree@...r.kernel.org
Cc:     linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
        chris.packham@...iedtelesis.co.nz,
        Kalyan Kinthada <kalyan.kinthada@...iedtelesis.co.nz>
Subject: [PATCH v2 0/1] Set FORCE_CSX bit when arbitration between NAND and NOR is enabled. 

When the arbitration between NOR and NAND flash is enabled
the <FORCE_CSX> field bit[21] in the Data Flash Control Register
needs to be set to 1 according to guidleine GL-5830741.

Set the FORCE_CSX bit in NDCR for ARMADA370 variants as the arbitration
is always enabled by default.

Changes since v1:

Thanks Miquel RAYNAL for the suggestion.
* Deleted: "dt-bindings: mtd: pxa3xx: Add "marvell,nand-force-csx" compatible string"
  Not necessary to create a new compatible string.

* "mtd-nand-pxa3xx-Set-FORCE_CSX-bit-to-ARMADA370-variants" 
  Modified commit message.
  This commit sets the FORCE_CSX bit for all ARMADA370 variants.

----
Kalyan Kinthada (1):
  mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants.

 drivers/mtd/nand/pxa3xx_nand.c | 7 +++++++
 1 file changed, 7 insertions(+)

-- 
2.14.1

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