linux-kernel - Re: [PATCH v2] acpi: apei: Add SEI notification type support for ARMv8

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Date:   Wed, 27 Sep 2017 08:19:35 -0600
From:   Tyler Baicar <tbaicar@...eaurora.org>
To:     gengdongjiu <gengdongjiu@...wei.com>, will.deacon@....com,
        zjzhang@...eaurora.org, catalin.marinas@....com, bp@...e.de,
        james.morse@....com, geliangtang@...il.com,
        andriy.shevchenko@...ux.intel.com, tony.luck@...el.com,
        austinwc@...eaurora.org, rjw@...ysocki.net, lenb@...nel.org,
        linux-acpi@...r.kernel.org, linux-kernel@...r.kernel.org,
        linuxarm@...wei.com, john.garry@...wei.com, shiju.jose@...wei.com,
        zhengqiang10@...wei.com, wangxiongfeng2@...wei.com,
        Stephen Boyd <sboyd@...eaurora.org>
Cc:     huangshaoyu@...wei.com, wuquanming@...wei.com
Subject: Re: [PATCH v2] acpi: apei: Add SEI notification type support for
 ARMv8

On 9/27/2017 6:05 AM, gengdongjiu wrote:
> Tyler, Stephen
>
> On 2017/9/27 3:23, Tyler Baicar wrote:
>>> Signed-off-by: Dongjiu Geng <gengdongjiu@...wei.com>
>> Tested-by: Tyler Baicar <tbaicar@...eaurora.org>
>>
>> Tested this functionality using SEA support.
>>
>> ++Stephen,
>>
>> Something to be aware of, this patch will conflict with https://lkml.org/lkml/2017/9/14/663
>> It may make sense to just remove the conditions for the NMI configs as part of this patch or in a series with this patch to avoid merge conflicts.
> In your patch, you only remove ACPI_APEI_SEA for the ARCH_HAVE_NMI_SAFE_CMPXCHG, do you need to remove it for the HAVE_NMI?
 From the latest comments it sounds like Stephen was going to remove it 
from both.
https://lkml.org/lkml/2017/9/15/350
>
>
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 3dcd7ec..8055997 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -19,6 +19,7 @@ config ARM64
>   	select ARCH_HAS_STRICT_KERNEL_RWX
>   	select ARCH_HAS_STRICT_MODULE_RWX
>   	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
> +	select ARCH_HAVE_NMI_SAFE_CMPXCHG if ACPI_APEI_SEA
>   	select ARCH_USE_CMPXCHG_LOCKREF
>   	select ARCH_SUPPORTS_ATOMIC_RMW
>   	select ARCH_SUPPORTS_NUMA_BALANCING
> @@ -92,6 +93,7 @@ config ARM64
>   	select HAVE_IRQ_TIME_ACCOUNTING
>   	select HAVE_MEMBLOCK
>   	select HAVE_MEMBLOCK_NODE_MAP if NUMA
> +	select HAVE_NMI if ACPI_APEI_SEA
>   	select HAVE_PATA_PLATFORM
>   	select HAVE_PERF_EVENTS
>   	select HAVE_PERF_REGS
>
>> Thanks,
>> Tyler
>>> ---