linux-kernel - [RESEND] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

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Date:   Tue, 31 Oct 2017 05:58:53 +0000
From:   SZ Lin (林上智) <SZ.Lin@...a.com>
To:     Li Yang <leoyang.li@....com>, Shawn Guo <shawnguo@...nel.org>
CC:     Suresh Gupta <suresh.gupta@....com>,
        Minghuan Lian <Minghuan.Lian@....com>,
        Zhiqiang Hou <Zhiqiang.Hou@....com>,
        "andy.tang@....com" <andy.tang@....com>,
        "yi.sheng.lin@....com" <yi.sheng.lin@....com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Russell King <linux@...linux.org.uk>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        lkml <linux-kernel@...r.kernel.org>
Subject: [RESEND] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

> > Add QSPI node support, and this function is disabled by default This
> > setting could be overwritten in board-level definitions
>
> Adding Shawn Guo.
>
This patch is modified based on https://patchwork.ozlabs.org/patch/492099/. The originator of this patch is Haikun Wang.
> >
Signed-off-by: Haikun Wang <haikun.wang@...escale.com>
> > Signed-off-by: SZ Lin <sz.lin@...a.com>
>
> Acked-by: Li Yang <leoyang.li@....com>
>
> > ---
> >  arch/arm/boot/dts/ls1021a.dtsi | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/ls1021a.dtsi
> > b/arch/arm/boot/dts/ls1021a.dtsi index 7bb9df2c1460..9da876e47810
> > 100644
> > --- a/arch/arm/boot/dts/ls1021a.dtsi
> > +++ b/arch/arm/boot/dts/ls1021a.dtsi
> > @@ -154,6 +154,20 @@
> >                         big-endian;
> >                 };
> >
> > +               qspi: quadspi@...0000 {
> > +                       compatible = "fsl,ls1021a-qspi";
> > +                       #address-cells = <1>;
> > +                       #size-cells = <0>;
> > +                       reg = <0x0 0x1550000 0x0 0x10000>,
> > +                             <0x0 0x40000000 0x0 0x40000000>;
> > +                       reg-names = "QuadSPI", "QuadSPI-memory";
> > +                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clock-names = "qspi_en", "qspi";
> > +                       clocks = <&clockgen 4 1>, <&clockgen 4 1>;
> > +                       big-endian;
> > +                       status = "disabled";
> > +               };
> > +
> >                 esdhc: esdhc@...0000 {
> >                         compatible = "fsl,esdhc";
> >                         reg = <0x0 0x1560000 0x0 0x10000>;
> > --
> > 2.14.1
> >
> > --
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