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Date: Mon, 13 Nov 2017 21:45:21 +0200 From: Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com> To: intel-sgx-kernel-dev@...ts.01.org Cc: platform-driver-x86@...r.kernel.org, linux-kernel@...r.kernel.org, Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com> Subject: [PATCH v5 04/11] x86: define the feature control MSR's SGX launch control bit Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com> --- arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 31a7d1c0f204..43130f3c18a1 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -298,6 +298,7 @@ #define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */ #define X86_FEATURE_LA57 (16*32+16) /* 5-level page tables */ #define X86_FEATURE_RDPID (16*32+22) /* RDPID instruction */ +#define X86_FEATURE_SGX_LC (16*32+30) /* supports SGX launch configuration */ /* AMD-defined CPU features, CPUID level 0x80000007 (ebx), word 17 */ #define X86_FEATURE_OVERFLOW_RECOV (17*32+0) /* MCA overflow recovery support */ -- 2.14.1
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