linux-kernel - Re: [PATCH] x86/pti: Fix !PCID and sanitize defines

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 16 Jan 2018 01:57:19 +0100
From:   Ingo Molnar <mingo@...nel.org>
To:     Laura Abbott <labbott@...hat.com>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Andy Lutomirski <luto@...nel.org>, Willy Tarreau <w@....eu>,
        Peter Zijlstra <peterz@...radead.org>,
        Borislav Petkov <bp@...en8.de>, X86 ML <x86@...nel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        David Woodhouse <dwmw@...zon.co.uk>,
        stable <stable@...r.kernel.org>
Subject: Re: [PATCH] x86/pti: Fix !PCID and sanitize defines


* Laura Abbott <labbott@...hat.com> wrote:

> On 01/13/2018 03:23 PM, Thomas Gleixner wrote:
> > The switch to the user space page tables in the low level ASM code sets
> > unconditionally bit 12 and bit 11 of CR3. Bit 12 is switching the base
> > address of the page directory to the user part, bit 11 is switching the
> > PCID to the PCID associated with the user page tables.
> > 
> > This fails on a machine which lacks PCID support because bit 11 is set in
> > CR3. Bit 11 is reserved when PCID is inactive.
> > 
> > While the Intel SDM claims that the reserved bits are ignored when PCID is
> > disabled, the AMD APM states that they should be cleared.
> > 
> > This went unnoticed as the AMD APM was not checked when the code was
> > developed and reviewed and test systems with Intel CPUs never failed to
> > boot. The report is against a Centos 6 host where the guest fails to boot,
> > so it's not yet clear whether this is a virt issue or can happen on real
> > hardware too, but thats irrelevant as the AMD APM clearly ask for clearing
> > the reserved bits.
> > 
> > Make sure that on non PCID machines bit 11 is not set by the page table
> > switching code.
> > 
> > Andy suggested to rename the related bits and masks so they are clearly
> > describing what they should be used for, which is done as well for clarity.
> > 
> > That split could have been done with alternatives but the macro hell is
> > horrible and ugly. This can be done on top if someone cares to remove the
> > extra orq. For now it's a straight forward fix.
> > 
> 
> Original reporter confirmed it fixes the problem. Thanks for the
> prompt response.

Thanks for the confirmation. Now the fix is upstream and Greg queued it up as well 
earlier today, so this fix is part of the next -stable iteration as well.

Thanks,

	Ingo