linux-kernel - Re: [PATCH v2 12/12] x86/jailhouse: Initialize PCI support

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Date:   Mon, 22 Jan 2018 16:26:10 -0600
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Jan Kiszka <jan.kiszka@...mens.com>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        "H . Peter Anvin" <hpa@...or.com>, x86@...nel.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        jailhouse-dev@...glegroups.com
Subject: Re: [PATCH v2 12/12] x86/jailhouse: Initialize PCI support

On Mon, Nov 27, 2017 at 09:11:54AM +0100, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@...mens.com>
> 
> With this change, PCI devices can be detected and used inside a non-root
> cell.
> 
> Signed-off-by: Jan Kiszka <jan.kiszka@...mens.com>
> ---
>  arch/x86/kernel/jailhouse.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c
> index 8ff21e1534de..70b857d4b1f5 100644
> --- a/arch/x86/kernel/jailhouse.c
> +++ b/arch/x86/kernel/jailhouse.c
> @@ -18,6 +18,7 @@
>  #include <asm/hypervisor.h>
>  #include <asm/i8259.h>
>  #include <asm/irqdomain.h>
> +#include <asm/pci_x86.h>
>  #include <asm/reboot.h>
>  #include <asm/setup.h>
>  
> @@ -108,6 +109,19 @@ static void jailhouse_no_restart(void)
>  	machine_halt();
>  }
>  
> +static int __init jailhouse_pci_arch_init(void)
> +{
> +	pci_direct_init(1);
> +
> +	/*
> +	 * There are no bridges on the virtual PCI root bus under Jailhouse,
> +	 * thus no other way to discover all devices than a full scan.
> +	 */
> +	pcibios_last_bus = 0xff;

Can you help me understand the comment here?  If the virtual root bus
is bus 00, are you saying the guest might see devices on bus 00 and
bus 01, with no bus 00 bridge that leads to bus 01?

I suspect you mean something different because you say elsewhere that
ARM "just works" because DT provides more configurability.  But even
on ARM with DT, we probe the root bus and only probe other buses when
we find bridges leading to them.

So I suspect the purpose of this may be to discover devices that are
below host bridges not exposed by ACPI.  For example, my BIOS may
expose one host bridge:

  ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-7e])

but the chipset may implement devices on bus 7f even though the BIOS
did not advertise the host bridge leading to that bus.  This is a case
of a missing host bridge, not a missing bridge on the root bus.

Can you show an example "lspci -v" output to make this concrete?

> +	return 0;
> +}
> +
>  static void __init jailhouse_init_platform(void)
>  {
>  	u64 pa_data = boot_params.hdr.setup_data;
> @@ -117,6 +131,7 @@ static void __init jailhouse_init_platform(void)
>  	x86_init.irqs.pre_vector_init	= x86_init_noop;
>  	x86_init.timers.timer_init	= jailhouse_timer_init;
>  	x86_init.mpparse.get_smp_config	= jailhouse_get_smp_config;
> +	x86_init.pci.arch_init		= jailhouse_pci_arch_init;
>  
>  	x86_platform.calibrate_cpu	= jailhouse_get_tsc;
>  	x86_platform.calibrate_tsc	= jailhouse_get_tsc;
> @@ -159,6 +174,8 @@ static void __init jailhouse_init_platform(void)
>  
>  	precalibrated_tsc_khz = setup_data.tsc_khz;
>  
> +	pci_probe = 0;
> +
>  	/*
>  	 * Avoid that the kernel complains about missing ACPI tables - there
>  	 * are none in a non-root cell.
> -- 
> 2.12.3
>