linux-kernel - [PATCH RFC 1/6] MIPS: Allow board to override TLB initialization

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Date:   Tue, 23 Jan 2018 17:47:01 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     linux-mips@...ux-mips.org
Cc:     Florian Fainelli <florian.fainelli@...adcom.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Kevin Cernekee <cernekee@...il.com>,
        James Hogan <jhogan@...nel.org>,
        Paul Burton <paul.burton@...s.com>,
        Matt Redfearn <matt.redfearn@...s.com>,
        "Maciej W. Rozycki" <macro@...s.com>,
        Huacai Chen <chenhc@...ote.com>,
        Kate Stewart <kstewart@...uxfoundation.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Marcin Nowakowski <marcin.nowakowski@...s.com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        "Eric W. Biederman" <ebiederm@...ssion.com>,
        Ingo Molnar <mingo@...nel.org>,
        David Howells <dhowells@...hat.com>,
        Kees Cook <keescook@...omium.org>,
        Thomas Meyer <thomas@...3r.de>,
        "Bryan O'Donoghue" <pure.logic@...us-software.ie>,
        Robin Murphy <robin.murphy@....com>,
        Michal Hocko <mhocko@...e.com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Vladimir Murzin <vladimir.murzin@....com>,
        Bart Van Assche <bart.vanassche@...disk.com>,
        linux-kernel@...r.kernel.org (open list)
Subject: [PATCH RFC 1/6] MIPS: Allow board to override TLB initialization

From: Florian Fainelli <florian.fainelli@...adcom.com>

Some boards may have to override how the TLB initialization is done,
e.g: to support eXtended Kseg0/1 features on Broadcom BMIPS boards.
Allow this to happen by providing a board_tlb_init() hook.

Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
---
 arch/mips/include/asm/traps.h | 1 +
 arch/mips/kernel/traps.c      | 6 +++++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/traps.h b/arch/mips/include/asm/traps.h
index f41cf3ee82a7..66c9c855be6e 100644
--- a/arch/mips/include/asm/traps.h
+++ b/arch/mips/include/asm/traps.h
@@ -26,6 +26,7 @@ extern void (*board_ejtag_handler_setup)(void);
 extern void (*board_bind_eic_interrupt)(int irq, int regset);
 extern void (*board_ebase_setup)(void);
 extern void (*board_cache_error_setup)(void);
+extern void (*board_tlb_init)(void);
 
 extern int register_nmi_notifier(struct notifier_block *nb);
 
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 5d19ed07e99d..b03864eb8213 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -106,6 +106,7 @@ void (*board_ejtag_handler_setup)(void);
 void (*board_bind_eic_interrupt)(int irq, int regset);
 void (*board_ebase_setup)(void);
 void(*board_cache_error_setup)(void);
+void (*board_tlb_init)(void);
 
 static void show_raw_backtrace(unsigned long reg29)
 {
@@ -2230,7 +2231,10 @@ void per_cpu_trap_init(bool is_boot_cpu)
 	/* Boot CPU's cache setup in setup_arch(). */
 	if (!is_boot_cpu)
 		cpu_cache_init();
-	tlb_init();
+	if (board_tlb_init)
+		board_tlb_init();
+	else
+		tlb_init();
 	TLBMISS_HANDLER_SETUP();
 }
 
-- 
2.7.4