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Date:   Mon, 29 Jan 2018 13:03:24 +0100
From:   Philipp Rossak <embed3d@...il.com>
To:     Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc:     lee.jones@...aro.org, robh+dt@...nel.org, mark.rutland@....com,
        wens@...e.org, linux@...linux.org.uk, jic23@...nel.org,
        knaack.h@....de, lars@...afoo.de, pmeerw@...erw.net,
        davem@...emloft.net, hans.verkuil@...co.com, mchehab@...nel.org,
        rask@...melder.dk, clabbe.montjoie@...il.com, sean@...s.org,
        krzk@...nel.org, quentin.schulz@...e-electrons.com,
        icenowy@...c.io, edu.molinas@...il.com, singhalsimran0@...il.com,
        linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-sunxi@...glegroups.com
Subject: Re: [PATCH v2 14/16] arm: dts: sun8i: h3: enable H3 sid controller



On 29.01.2018 10:52, Maxime Ripard wrote:
> On Mon, Jan 29, 2018 at 12:29:17AM +0100, Philipp Rossak wrote:
>> This patch enables the the sid controller in the H3. It can be used
>> for thermal calibration data.
>>
>> Signed-off-by: Philipp Rossak <embed3d@...il.com>
>> ---
>>   arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++++++
>>   1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
>> index 3f83f6a27c74..9bb5cc29fec5 100644
>> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
>> @@ -72,6 +72,13 @@
>>   		};
>>   	};
>>   
>> +	soc {
>> +		sid: eeprom@...4000 {
>> +			compatible = "allwinner,sun8i-h3-sid";
>> +			reg = <0x01c14000 0x400>;
>> +		};
>> +	};
>> +
> 
> Shouldn't you also use a nvmem-cells property to the THS node?
> 
> Maxime
> 

Oh seems like I forgot that.
As related to the wiki [1] this should be 64 bit wide at the address 
0x34. I will add that in the next version.


[1]: http://linux-sunxi.org/SID_Register_Guide#eFUSE

Thanks,
Philipp

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