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Date:   Mon, 29 Jan 2018 11:27:34 -0500
From:   Luiz Capitulino <lcapitulino@...hat.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     Frederic Weisbecker <frederic@...nel.org>,
        Ingo Molnar <mingo@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Chris Metcalf <cmetcalf@...lanox.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Christoph Lameter <cl@...ux.com>,
        "Paul E . McKenney" <paulmck@...ux.vnet.ibm.com>,
        Wanpeng Li <kernellwp@...il.com>,
        Mike Galbraith <efault@....de>, Rik van Riel <riel@...hat.com>
Subject: Re: [GIT PULL] isolation: 1Hz residual tick offloading v4

On Mon, 29 Jan 2018 16:54:31 +0100
Peter Zijlstra <peterz@...radead.org> wrote:

> On Mon, Jan 29, 2018 at 10:33:16AM -0500, Luiz Capitulino wrote:
> > Cool, passing tsc=reliable worked for me. I finally got to the tick to
> > go completely away. While I agree that fixing that is beyond the scope
> > of this series, I think we should improve it anyway since it will probably
> > come up for people trying the new nohz_full=.  
> 
> The only way to fix that is to audit all BIOS code :/ Short of that, we
> need to periodically test the TSC on each CPU/SOCKET to verify its still
> in step with expectation.

Oh, OK. I thought we could find a way to avoid the timer in the kernel
for certain CPUs like mine.

Thanks for the explanation.

> 
> Sadly MSR_IA32_TSC and MSR_IA32_TSC_ADJUST are writable registers and
> BIOS monkeys occasionally write to them for 'raisins-of-insanity'.
> 

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