linux-kernel - Re: [PATCH v2 4/4] x86: vmx: Allow direct access to MSR_IA32_ARCH

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Date:   Mon, 29 Jan 2018 19:57:45 +0100
From:   KarimAllah Ahmed <karahmed@...zon.com>
To:     Jim Mattson <jmattson@...gle.com>,
        KarimAllah Ahmed <karahmed@...zon.de>
CC:     kvm list <kvm@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        "the arch/x86 maintainers" <x86@...nel.org>,
        Asit Mallick <asit.k.mallick@...el.com>,
        Dave Hansen <dave.hansen@...el.com>,
        "Arjan Van De Ven" <arjan.van.de.ven@...el.com>,
        Tim Chen <tim.c.chen@...ux.intel.com>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Andrea Arcangeli <aarcange@...hat.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Dan Williams <dan.j.williams@...el.com>,
        Jun Nakajima <jun.nakajima@...el.com>,
        Andy Lutomirski <luto@...nel.org>,
        Greg KH <gregkh@...uxfoundation.org>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Ashok Raj <ashok.raj@...el.com>
Subject: Re: [PATCH v2 4/4] x86: vmx: Allow direct access to
 MSR_IA32_ARCH_CAPABILITIES

On 01/29/2018 07:55 PM, Jim Mattson wrote:
> Why should this MSR be pass-through? I doubt that it would be accessed
> frequently.

True. Will update it to be emulated and allow user-space to set the 
value exposed.

> 
> On Sun, Jan 28, 2018 at 4:58 PM, KarimAllah Ahmed <karahmed@...zon.de> wrote:
>> Add direct access to MSR_IA32_SPEC_CTRL for guests. Future intel processors
>> will use this MSR to indicate RDCL_NO (bit 0) and IBRS_ALL (bit 1).
>>
>> Cc: Asit Mallick <asit.k.mallick@...el.com>
>> Cc: Dave Hansen <dave.hansen@...el.com>
>> Cc: Arjan Van De Ven <arjan.van.de.ven@...el.com>
>> Cc: Tim Chen <tim.c.chen@...ux.intel.com>
>> Cc: Linus Torvalds <torvalds@...ux-foundation.org>
>> Cc: Andrea Arcangeli <aarcange@...hat.com>
>> Cc: Andi Kleen <ak@...ux.intel.com>
>> Cc: Thomas Gleixner <tglx@...utronix.de>
>> Cc: Dan Williams <dan.j.williams@...el.com>
>> Cc: Jun Nakajima <jun.nakajima@...el.com>
>> Cc: Andy Lutomirski <luto@...nel.org>
>> Cc: Greg KH <gregkh@...uxfoundation.org>
>> Cc: Paolo Bonzini <pbonzini@...hat.com>
>> Cc: Ashok Raj <ashok.raj@...el.com>
>> Signed-off-by: KarimAllah Ahmed <karahmed@...zon.de>
>> ---
>>   arch/x86/kvm/cpuid.c | 4 +++-
>>   arch/x86/kvm/vmx.c   | 2 ++
>>   2 files changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>> index 32c0c14..2339b1a 100644
>> --- a/arch/x86/kvm/cpuid.c
>> +++ b/arch/x86/kvm/cpuid.c
>> @@ -71,6 +71,7 @@ u64 kvm_supported_xcr0(void)
>>   #define KVM_CPUID_BIT_AVX512_4VNNIW     2
>>   #define KVM_CPUID_BIT_AVX512_4FMAPS     3
>>   #define KVM_CPUID_BIT_IBRS              26
>> +#define KVM_CPUID_BIT_ARCH_CAPABILITIES 29
>>   #define KF(x) bit(KVM_CPUID_BIT_##x)
>>
>>   int kvm_update_cpuid(struct kvm_vcpu *vcpu)
>> @@ -394,7 +395,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
>>          /* cpuid 7.0.edx*/
>>          const u32 kvm_cpuid_7_0_edx_x86_features =
>>                  KF(AVX512_4VNNIW) | KF(AVX512_4FMAPS) | \
>> -               (boot_cpu_has(X86_FEATURE_IBRS) ? KF(IBRS) : 0);
>> +               (boot_cpu_has(X86_FEATURE_IBRS) ? KF(IBRS) : 0) | \
>> +               (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES) ? KF(ARCH_CAPABILITIES) : 0);
>>
>>          /* all calls to cpuid_count() should be made on the same cpu */
>>          get_cpu();
>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>> index f82a44c..99cb761 100644
>> --- a/arch/x86/kvm/vmx.c
>> +++ b/arch/x86/kvm/vmx.c
>> @@ -9617,6 +9617,8 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
>>
>>          if (boot_cpu_has(X86_FEATURE_IBPB))
>>                  vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_PRED_CMD, MSR_TYPE_RW);
>> +       if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
>> +               vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_ARCH_CAPABILITIES, MSR_TYPE_R);
>>          vmx_disable_intercept_for_msr(msr_bitmap, MSR_FS_BASE, MSR_TYPE_RW);
>>          vmx_disable_intercept_for_msr(msr_bitmap, MSR_GS_BASE, MSR_TYPE_RW);
>>          vmx_disable_intercept_for_msr(msr_bitmap, MSR_KERNEL_GS_BASE, MSR_TYPE_RW);
>> --
>> 2.7.4
>>
> 
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