linux-kernel - Re: [PATCH 0/4] Move DP phy switch to PHY driver

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Date:   Fri, 16 Feb 2018 14:05:22 +0100
From:   Heiko Stübner <heiko@...ech.de>
To:     Kishon Vijay Abraham I <kishon@...com>
Cc:     Chris Zhong <zyw@...k-chips.com>, dri-devel@...ts.freedesktop.org,
        robh@...nel.org, linux-rockchip@...ts.infradead.org,
        linux-kernel@...r.kernel.org, mark.yao@...k-chips.com,
        groeck@...omium.org, seanpaul@...omium.org,
        William wu <wulf@...k-chips.com>,
        Rob Herring <robh+dt@...nel.org>,
        David Airlie <airlied@...ux.ie>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Elaine Zhang <zhangqing@...k-chips.com>,
        David Wu <david.wu@...k-chips.com>,
        Kever Yang <kever.yang@...k-chips.com>,
        Brian Norris <briannorris@...omium.org>,
        Tomasz Figa <tfiga@...omium.org>,
        Douglas Anderson <dianders@...omium.org>,
        Will Deacon <will.deacon@....com>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Jianqun Xu <jay.xu@...k-chips.com>,
        Caesar Wang <wxt@...k-chips.com>,
        Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH 0/4] Move DP phy switch to PHY driver

Hi Kishon,

Am Freitag, 16. Februar 2018, 12:04:42 CET schrieb Kishon Vijay Abraham I:
> On Friday 10 February 2017 01:14 PM, Chris Zhong wrote:
> > There are 2 Type-c PHYs in RK3399, but only one DP controller. Hence
> > only one PHY can connect to DP controller at one time, the other should
> > be disconnected. The GRF_SOC_CON26 register has a switch bit to do it,
> > set this bit means enable PHY 1, clear this bit means enable PHY 0.
> > 
> > If the board has 2 Type-C ports, the DP driver get the phy id from
> > devm_of_phy_get_by_index, and then control this switch according to
> > this id. But some others board only has one Type-C port, it may be PHY 0
> > or PHY 1. The dts node id can not tell us the correct PHY id. Hence move
> > this switch to PHY driver, the PHY driver can distinguish between PHY 0
> > and PHY 1, and then write the correct register bit.
> 
> Changed subject of "Documentation: bindings: add uphy-dp-sel for Rockchip
> USB Type-C PHY" as suggested by Rob, rebased "phy: rockchip-typec: support
> DP phy switch" to the latest kernel and merged.

I'm not sure how far along you are with your merging, but you might want to 
revert this one.

In your inbox you should find more recent threads about the type-c phy
where Rob strongly suggested moving the whole grf registers out of the
dt and into the driver.

Enric Balletbo did just that and posted a series (including the dp-move)
yesterday (refined in a v2 from today).

Alternatively Enric could rebase his series on top of that recent change.


Heiko