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Date: Sun, 4 Mar 2018 20:07:21 +0800 From: Luwei Kang <luwei.kang@...el.com> To: kvm@...r.kernel.org Cc: tglx@...utronix.de, mingo@...hat.com, hpa@...or.com, x86@...nel.org, pbonzini@...hat.com, rkrcmar@...hat.com, linux-kernel@...r.kernel.org, joro@...tes.org, Luwei Kang <luwei.kang@...el.com> Subject: [PATCH v5 11/11] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest Currently, Intel Processor Trace do not support tracing in L1 guest VMX operation(IA32_VMX_MISC[bit 14] is 0). As mentioned in SDM, on these type of processors, execution of the VMXON instruction will clears IA32_RTIT_CTL.TraceEn and any attempt to write IA32_RTIT_CTL causes a general-protection exception (#GP). Signed-off-by: Luwei Kang <luwei.kang@...el.com> --- arch/x86/kvm/vmx.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 0a55772..a1ec71d 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -3710,7 +3710,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) clear_atomic_switch_msr(vmx, MSR_IA32_XSS); break; case MSR_IA32_RTIT_CTL: - if (!vmx_pt_supported() || vmx_rtit_ctl_check(vcpu, data)) + if (!vmx_pt_supported() || vmx_rtit_ctl_check(vcpu, data) || + vmx->nested.vmxon) return 1; vmcs_write64(GUEST_IA32_RTIT_CTL, data); vmx->pt_desc.guest.ctl = data; @@ -7783,6 +7784,12 @@ static int handle_vmon(struct kvm_vcpu *vcpu) if (ret) return ret; + if (pt_mode == PT_MODE_HOST_GUEST) { + vmx->pt_desc.guest.ctl = 0; + vmcs_write64(GUEST_IA32_RTIT_CTL, 0); + pt_set_intercept_for_msr(vmx, 1); + } + nested_vmx_succeed(vcpu); return kvm_skip_emulated_instruction(vcpu); } -- 1.8.3.1
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