lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Wed, 7 Mar 2018 10:30:09 -0600
From:   Rob Herring <robh+dt@...nel.org>
To:     Vivek Gautam <vivek.gautam@...eaurora.org>
Cc:     Linux IOMMU <iommu@...ts.linux-foundation.org>,
        Joerg Roedel <joro@...tes.org>,
        Robin Murphy <robin.murphy@....com>,
        Tomasz Figa <tfiga@...omium.org>,
        Mark Rutland <mark.rutland@....com>,
        Will Deacon <will.deacon@....com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>,
        "moderated list:ARM SMMU DRIVERS" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 1/1] iommu/arm-smmu: Add support for qcom,smmu-500 variant

On Wed, Mar 7, 2018 at 12:32 AM, Vivek Gautam
<vivek.gautam@...eaurora.org> wrote:
> Qualcomm's arm-smmu 500 implementation supports runtime pm
> so enable the same.

That's a driver detail unrelated to the binding.

>
> Signed-off-by: Vivek Gautam <vivek.gautam@...eaurora.org>
> ---
>
>  Based on iommu/arm-smmu pm runtime support series [1]:
>  [PATCH v8 0/5] iommu/arm-smmu: Add runtime pm/sleep support
>
>  Tested on sdm845 with necessary support to enable the smmu
>  and with necessary user.
>
>  [1] https://lkml.org/lkml/2018/3/2/325
>
>  Documentation/devicetree/bindings/iommu/arm,smmu.txt | 14 ++++++++++++++

Please split bindings to separate patches.

>  drivers/iommu/arm-smmu.c                             |  8 ++++++++
>  2 files changed, 22 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> index 6ea27bd4f785..0b5c6d2a9865 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> @@ -18,6 +18,7 @@ conditions.
>                          "arm,mmu-500"
>                          "cavium,smmu-v2"
>                          "qcom,<soc>-smmu-v2", "qcom,smmu-v2"

I don't even see this one in the tree yet...

> +                        "qcom,<soc>-smmu-500", "qcom,smmu-500"

IIRC, the mmu-500 is SMMU v2 implementation, right? Having
qcom,smmu-500 seems kind of pointless.

Given that we're there's only 1 SoC for "qcom,<soc>-smmu-v2" and
you're already on to a new genericish compatible, just do SoC specific
compatible strings.

Rob

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ