lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 8 Mar 2018 14:12:48 +1030
From:   Joel Stanley <joel@....id.au>
To:     Eddie James <eajames@...ux.vnet.ibm.com>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-clk@...r.kernel.org,
        Michael Turquette <mturquette@...libre.com>, sboyd@...nel.org,
        Lei YU <mine260309@...il.com>,
        Ryan Chen <ryan_chen@...eedtech.com>
Subject: Re: [PATCH] clk: aspeed: Prevent reset if clock is enabled

Hi Eddie,

On Thu, Mar 8, 2018 at 3:06 AM, Eddie James <eajames@...ux.vnet.ibm.com> wrote:
> According to the Aspeed specification, the reset and enable sequence
> should be done when the clock is stopped. The specification doesn't
> define behavior if the reset is done while the clock is enabled.
>
> From testing on the AST2500, the LPC Controller has problems if the
> clock is reset while enabled.
>
> Therefore, check whether the clock is enabled or not before performing
> the reset and enable sequence in the Aspeed clock driver.
>
> Signed-off-by: Eddie James <eajames@...ux.vnet.ibm.com>
> ---
>  drivers/clk/clk-aspeed.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/clk/clk-aspeed.c b/drivers/clk/clk-aspeed.c
> index 9f7f931..a13054d 100644
> --- a/drivers/clk/clk-aspeed.c
> +++ b/drivers/clk/clk-aspeed.c
> @@ -212,6 +212,12 @@ static int aspeed_clk_enable(struct clk_hw *hw)
>         u32 clk = BIT(gate->clock_idx);
>         u32 rst = BIT(gate->reset_idx);
>         u32 enval;
> +       u32 reg;
> +
> +       /* Only reset/enable/unreset if clock is stopped */
> +       regmap_read(gate->map, ASPEED_CLK_STOP_CTRL, &reg);
> +       if (!(reg & clk))
> +               return 0;

This doesn't generalise to all of the clocks, as some clocks use set
to disable. Perhaps we could do something like this:

       /* Only reset/enable/unreset if clock is stopped. The LPC clock
on ast2500 has issues otherwise */
       enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;
       regmap_read(gate->map, ASPEED_CLK_STOP_CTRL, &reg);
       if ((reg & clk) == enval) {
               spin_unlock_irqrestore(gate->lock, flags);
               return 0;
       }

I think we should also do this operation under the lock.

Please cc Ryan Chen <ryan_chen@...eedtech.com> so he can confirm that
this workaround is valid, and credit Lei who spent a lot of time
investigating this issue. Perhaps "Root-caused-by".

Cheers,

Joel

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ