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Date:   Thu, 8 Mar 2018 16:27:16 -0600
From:   Rob Herring <robh@...nel.org>
To:     Alan Tull <atull@...nel.org>
Cc:     Richard Gong <richard.gong@...ux.intel.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        Dinh Nguyen <dinguyen@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Moritz Fischer <mdf@...nel.org>, Arnd Bergmann <arnd@...db.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>, linux-fpga@...r.kernel.org,
        Yves Vandervennet <yves.vandervennet@...ux.intel.com>
Subject: Re: [PATCHv2 4/7] dt-bindings: fpga: add Stratix10 SoC FPGA manager binding

On Thu, Mar 8, 2018 at 9:32 AM, Alan Tull <atull@...nel.org> wrote:
> On Wed, Mar 7, 2018 at 7:24 PM, Rob Herring <robh@...nel.org> wrote:
>> On Wed, Mar 7, 2018 at 4:20 PM, Alan Tull <atull@...nel.org> wrote:
>>> On Wed, Mar 7, 2018 at 1:47 PM, Rob Herring <robh@...nel.org> wrote:
>>>> On Thu, Mar 01, 2018 at 06:19:32PM -0600, richard.gong@...ux.intel.com wrote:
>>>>> From: Alan Tull <atull@...nel.org>
>>>>>
>>>>> Add a Device Tree binding for the Intel Stratix10 SoC FPGA manager.
>>>>>
>>>>> Signed-off-by: Alan Tull <atull@...nel.org>
>>>>> ---
>>>>> v2: this patch is added in patch set version 2
>>>>> ---
>>>>>  .../devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt  | 10 ++++++++++
>>>>>  1 file changed, 10 insertions(+)
>>>>>  create mode 100644 Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
>>>>> new file mode 100644
>>>>> index 0000000..78de689
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
>>>>> @@ -0,0 +1,10 @@
>>>>> +Intel Stratix10 SoC FPGA Manager
>>>>> +
>>>>> +Required properties:
>>>>> +- compatible : should contain "intel,stratix10-soc-fpga-mgr"
>>>>> +
>>>>> +Example:
>>>>> +
>>>>> +     fpga_mgr: fpga-mgr@0 {
>>>>> +             compatible = "intel,stratix10-soc-fpga-mgr";
>>>>
>>>> No reg or anything else? Is that because it all goes thru the service
>>>> layer firmware?
>>>
>>> Yes.
>>>
>>> There will be a few more clients of the service layer: QSPI, Crypto
>>> and warm reset.
>>>
>>>> Just get the service layer driver to instantiate a
>>>> device for this driver or get rid of the 2 layers if that's all the
>>>> firmware interface does. DT is not a Linux driver instantiation
>>>> mechanism.
>>>
>>> Right, this should be describing hardware.
>>>
>>> I could add this to the service layer binding:
>>>
>>> firmware {
>>>         svc {
>>>                 compatible = "intel,stratix10-svc";
>>>                 method = "smc";
>>>                 memory-region = <&service_reserved>;
>>>                 fpga-mgr {
>
> Actually, add a label.
>
>                   fpga_mgr: fpga-mgr {
>
>>>                         compatible = "intel,stratix10-soc-fpga-mgr";
>>
>> Still, why do you need this node? If you don't have any other cross
>> tree connections, then the service layer can instantiate the
>> device(s).
>
> It's used for the FPGA region to know what mgr can program the region.

Ah yes, that's probably good enough reason.

Rob

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