lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 21 Mar 2018 14:13:33 -0500
From:   Yazen Ghannam <Yazen.Ghannam@....com>
To:     linux-edac@...r.kernel.org
Cc:     Yazen Ghannam <Yazen.Ghannam@....com>,
        linux-kernel@...r.kernel.org, bp@...e.de
Subject: [PATCH 1/3] EDAC/amd64: Print ECC enabled/disabled for nodes with enabled MCs

From: Yazen Ghannam <yazen.ghannam@....com>

It's possible that a system can be used without any DRAM populated on
one or more physical Dies on multi-die systems. Firmware will not
enable DRAM ECC on Dies without DRAM. Users will then see a message
about DRAM ECC disabled on those nodes without DRAM. However, DRAM ECC
may, in fact, be enabled on the other Dies that have DRAM.

Only print ECC enabled/disabled information for nodes that have at least
one enabled memory channel. A memory channel that is unused, i.e. has no
DRAM, should be seen as disabled. DRAM ECC information is not relevant
on nodes without DRAM.

Cc: <stable@...r.kernel.org> # 4.14.x
Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
---
 drivers/edac/amd64_edac.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 329cb96f886f..af0ce9aa8d24 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -3035,6 +3035,7 @@ static const char *ecc_msg =
 static bool ecc_enabled(struct pci_dev *F3, u16 nid)
 {
 	bool nb_mce_en = false;
+	bool mc_en = true;
 	u8 ecc_en = 0, i;
 	u32 value;
 
@@ -3060,6 +3061,8 @@ static bool ecc_enabled(struct pci_dev *F3, u16 nid)
 				ecc_en_mask |= BIT(i);
 		}
 
+		mc_en = !!umc_en_mask;
+
 		/* Check whether at least one UMC is enabled: */
 		if (umc_en_mask)
 			ecc_en = umc_en_mask == ecc_en_mask;
@@ -3079,14 +3082,19 @@ static bool ecc_enabled(struct pci_dev *F3, u16 nid)
 				     MSR_IA32_MCG_CTL, nid);
 	}
 
-	amd64_info("Node %d: DRAM ECC %s.\n",
-		   nid, (ecc_en ? "enabled" : "disabled"));
+	/*
+	 * Only print ECC enabled/disabled messages for nodes with enabled
+	 * memory controllers.
+	 */
+	if (mc_en) {
+		amd64_info("Node %d: DRAM ECC %s.\n",
+			   nid, (ecc_en ? "enabled" : "disabled"));
 
-	if (!ecc_en || !nb_mce_en) {
-		amd64_info("%s", ecc_msg);
-		return false;
+		if (!ecc_en || !nb_mce_en)
+			amd64_info("%s", ecc_msg);
 	}
-	return true;
+
+	return ecc_en && nb_mce_en;
 }
 
 static inline void
-- 
2.14.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ