linux-kernel - Re: [PATCH v2] kvm: nVMX: Introduce KVM_CAP

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Date:   Tue, 10 Apr 2018 07:11:10 +0000
From:   "Raslan, KarimAllah" <karahmed@...zon.de>
To:     "jmattson@...gle.com" <jmattson@...gle.com>
CC:     "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "x86@...nel.org" <x86@...nel.org>, "hpa@...or.com" <hpa@...or.com>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "pbonzini@...hat.com" <pbonzini@...hat.com>,
        "rkrcmar@...hat.com" <rkrcmar@...hat.com>
Subject: Re: [PATCH v2] kvm: nVMX: Introduce KVM_CAP_STATE

On Mon, 2018-04-09 at 12:24 -0700, Jim Mattson wrote:
> On Mon, Apr 9, 2018 at 1:37 AM, KarimAllah Ahmed <karahmed@...zon.de> wrote:
> 
> > 
> > +       /*
> > +        * Force a nested exit that guarantees that any state capture
> > +        * afterwards by any IOCTLs (MSRs, etc) will not capture a mix of L1
> > +        * and L2 state.
> > +        *
> > +        * One example where that would lead to an issue is the TSC DEADLINE
> > +        * MSR vs the guest TSC. If the L2 guest is running, the guest TSC will
> > +        * be the L2 TSC while the TSC deadline MSR will contain the L1 TSC
> > +        * deadline MSR. That would lead to a very large (and wrong) "expire"
> > +        * diff when LAPIC is initialized during instance restore (i.e. the
> > +        * instance will appear to have hanged!).
> > +        */
> 
> This sounds like a bug in the virtualization of IA32_TSC_DEADLINE.
> Without involving save/restore, what happens if L2 sets
> IA32_TSC_DEADLINE (and L1 permits it via the MSR permission bitmap)?
> The IA32_TSC_DEADLINE MSR is always specified with respect to L1's
> time domain.

That makes sense! Let me look into that!

Thanks!

> 
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