linux-kernel - Re: [PATCH 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

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Date:   Wed, 02 May 2018 08:27:08 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Taniya Das <tdas@...eaurora.org>
Cc:     Andy Gross <andy.gross@...aro.org>,
        David Brown <david.brown@...aro.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        Odelu Kukatla <okukatla@...eaurora.org>,
        Amit Nischal <anischal@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, Taniya Das <tdas@...eaurora.org>
Subject: Re: [PATCH 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Quoting Taniya Das (2018-05-02 03:51:17)
> +
> +static DEFINE_MUTEX(rpmh_clk_lock);
> +
> +#define __DEFINE_CLK_RPMH(_platform, _name, _name_active, _res_name,   \
> +                         _res_en_offset, _res_on)                      \
> +       static struct clk_rpmh _platform##_##_name_active;              \
> +       static struct clk_rpmh _platform##_##_name = {                  \
> +               .res_name = _res_name,                                  \
> +               .res_addr = _res_en_offset,                             \
> +               .res_on_val = _res_on,                                  \
> +               .peer = &_platform##_##_name_active,                    \
> +               .valid_state_mask = (BIT(RPMH_WAKE_ONLY_STATE) |        \
> +                                     BIT(RPMH_ACTIVE_ONLY_STATE) |     \
> +                                     BIT(RPMH_SLEEP_STATE)),           \
> +               .hw.init = &(struct clk_init_data){                     \
> +                       .ops = &clk_rpmh_ops,                           \
> +                       .name = #_name,                                 \
> +                       .parent_names = (const char *[]){ "xo_board",   \
> +                                               "xo_board_div" },       \

The rpmh clks that do a div 2 can have a recalc_rate function that
returns the xo_board clk rate divided by 2 all the time. That may be
easier to do. Keep xo_board as parent, but then specify if it does div-2
or div-1 in the SoC specific listing. Then DT can only show 38.4 MHz.
The div 2 part is inside the SoC anyway so this seems more accurate too.

> +                       .num_parents = 2,                               \
> +               },                                                      \
> +       };                                                              \