linux-kernel - Re: [PATCH] mtd: spi-nor: add support for Microchip 25LC256

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Date:   Tue, 15 May 2018 19:22:06 +0300
From:   Radu Pirea <radu.pirea@...rochip.com>
To:     Boris Brezillon <boris.brezillon@...tlin.com>
CC:     <linux-kernel@...r.kernel.org>, <linux-mtd@...ts.infradead.org>,
        <Zhiqiang.Hou@....com>, <pp@...ix.com>, <richard@....at>,
        <computersforpeace@...il.com>, <dwmw2@...radead.org>,
        <marek.vasut@...il.com>
Subject: Re: [PATCH] mtd: spi-nor: add support for Microchip 25LC256

On Fri, 2018-05-04 at 20:40 +0200, Boris Brezillon wrote:
> On Fri, 4 May 2018 18:54:04 +0300
> Radu Pirea <radu.pirea@...rochip.com> wrote:
> 
> > Added geometry description for Microchip 25LC256 memory.
> 
> Same as for the dataflash stuff you posted a few weeks ago: I don't
> think this device belongs in the SPI NOR framework.
Hi Boris,

25lc256 memory is similar with mr25h256, the only difference is the
page size(64 vs 256). Because mr25h256 is already in SPI NOR framework
I added here 25lc256.

> > 
> > Signed-off-by: Radu Pirea <radu.pirea@...rochip.com>
> > ---
> >  drivers/mtd/devices/m25p80.c  | 3 +++
> >  drivers/mtd/spi-nor/spi-nor.c | 3 +++
> >  2 files changed, 6 insertions(+)
> > 
> > diff --git a/drivers/mtd/devices/m25p80.c
> > b/drivers/mtd/devices/m25p80.c
> > index a4e18f6aaa33..1e359d811261 100644
> > --- a/drivers/mtd/devices/m25p80.c
> > +++ b/drivers/mtd/devices/m25p80.c
> > @@ -372,6 +372,9 @@ static const struct spi_device_id m25p_ids[] =
> > {
> >  	{ "mr25h10" },  /*   1 Mib, 40 MHz */
> >  	{ "mr25h40" },  /*   4 Mib, 40 MHz */
> >  
> > +	/* Microchip */
> > +	{ "25lc256" },
> > +
> >  	{ },
> >  };
> >  MODULE_DEVICE_TABLE(spi, m25p_ids);
> > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-
> > nor/spi-nor.c
> > index d445a4d3b770..6341c86be647 100644
> > --- a/drivers/mtd/spi-nor/spi-nor.c
> > +++ b/drivers/mtd/spi-nor/spi-nor.c
> > @@ -1076,6 +1076,9 @@ static const struct flash_info spi_nor_ids[]
> > = {
> >  	{ "mx66l1g45g",  INFO(0xc2201b, 0, 64 * 1024, 2048,
> > SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> >  	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048,
> > SPI_NOR_QUAD_READ) },
> >  
> > +	/* Microchip */
> > +	{ "25lc256", CAT25_INFO(32 * 1024, 1, 64, 2,
> > SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
> > +
> >  	/* Micron */
> >  	{ "n25q016a",	 INFO(0x20bb15, 0, 64 * 1024,   32,
> > SECT_4K | SPI_NOR_QUAD_READ) },
> >  	{ "n25q032",	 INFO(0x20ba16, 0, 64 * 1024,   64,
> > SPI_NOR_QUAD_READ) },
> 
> 
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