linux-kernel - Re: [PATCH v2 2/2] clk: meson: axg: let mpll clocks round closest

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 15 May 2018 18:46:02 +0200
From:   Neil Armstrong <narmstrong@...libre.com>
To:     Jerome Brunet <jbrunet@...libre.com>,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        Kevin Hilman <khilman@...libre.com>,
        Carlo Caione <carlo@...one.org>
Cc:     linux-amlogic@...ts.infradead.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] clk: meson: axg: let mpll clocks round closest

On 15/05/2018 18:36, Jerome Brunet wrote:
> Let the mpll dividers achieve the closest rate possible, even if
> it means rounding the requested rate up.
> 
> This is done to improve the accuracy of the rates provided by these
> plls to the audio subsystem
> 
> Signed-off-by: Jerome Brunet <jbrunet@...libre.com>
> ---
>  drivers/clk/meson/axg.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
> index 5f5d468c1efe..bd4dbc696b88 100644
> --- a/drivers/clk/meson/axg.c
> +++ b/drivers/clk/meson/axg.c
> @@ -461,6 +461,7 @@ static struct clk_regmap axg_mpll0_div = {
>  			.width	 = 1,
>  		},
>  		.lock = &meson_clk_lock,
> +		.flags = CLK_MESON_MPLL_ROUND_CLOSEST,
>  	},
>  	.hw.init = &(struct clk_init_data){
>  		.name = "mpll0_div",
> @@ -507,6 +508,7 @@ static struct clk_regmap axg_mpll1_div = {
>  			.width	 = 1,
>  		},
>  		.lock = &meson_clk_lock,
> +		.flags = CLK_MESON_MPLL_ROUND_CLOSEST,
>  	},
>  	.hw.init = &(struct clk_init_data){
>  		.name = "mpll1_div",
> @@ -553,6 +555,7 @@ static struct clk_regmap axg_mpll2_div = {
>  			.width	 = 1,
>  		},
>  		.lock = &meson_clk_lock,
> +		.flags = CLK_MESON_MPLL_ROUND_CLOSEST,
>  	},
>  	.hw.init = &(struct clk_init_data){
>  		.name = "mpll2_div",
> @@ -599,6 +602,7 @@ static struct clk_regmap axg_mpll3_div = {
>  			.width	 = 1,
>  		},
>  		.lock = &meson_clk_lock,
> +		.flags = CLK_MESON_MPLL_ROUND_CLOSEST,
>  	},
>  	.hw.init = &(struct clk_init_data){
>  		.name = "mpll3_div",
> 

Acked-by: Neil Armstrong <narmstrong@...libre.com>