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Date:   Wed, 16 May 2018 11:08:57 -0700
From:   Stephen Boyd <swboyd@...omium.org>
To:     rishabhb@...eaurora.org
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm@...ts.infradead.org, tsoni@...eaurora.org,
        ckadabi@...eaurora.org, evgreen@...omium.org, robh@...nel.org
Subject: Re: [PATCH v6 1/2] dt-bindings: Documentation for qcom, llcc

Quoting rishabhb@...eaurora.org (2018-05-16 10:33:14)
> On 2018-05-16 10:03, Stephen Boyd wrote:
> > Quoting Rishabh Bhatnagar (2018-05-08 13:22:00)
> 
> >> +
> >> +- max-slices:
> >> +       usage: required
> >> +       Value Type: <u32>
> >> +       Definition: Number of cache slices supported by hardware
> >> +
> >> +Example:
> >> +
> >> +       llcc: qcom,llcc@...0000 {
> > 
> > cache-controller@...0000 ?
> > 
> We have tried to use consistent naming convention as in llcc_* 
> everywhere.
> Using cache-controller will mix and match the naming convention. Also in
> the documentation it is explained what llcc is and its full form.
> 

DT prefers standard node names as opposed to vendor specific node names.
Isn't it a cache controller? I fail to see why this can't be done.

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