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Date: Wed, 6 Jun 2018 16:44:42 +0100
From: Will Deacon <will.deacon@....com>
To: Chintan Pandya <cpandya@...eaurora.org>
Cc: catalin.marinas@....com, mark.rutland@....com,
akpm@...ux-foundation.org, toshi.kani@....com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v13 2/3] arm64: tlbflush: Introduce
__flush_tlb_kernel_pgtable
On Wed, Jun 06, 2018 at 12:31:20PM +0530, Chintan Pandya wrote:
> Add an interface to invalidate intermediate page tables
> from TLB for kernel.
>
> Signed-off-by: Chintan Pandya <cpandya@...eaurora.org>
> ---
> arch/arm64/include/asm/tlbflush.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> index dfc61d7..a4a1901 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -218,6 +218,13 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm,
> dsb(ish);
> }
>
> +static inline void __flush_tlb_kernel_pgtable(unsigned long kaddr)
> +{
> + unsigned long addr = __TLBI_VADDR(kaddr, 0);
> +
> + __tlbi(vaae1is, addr);
> + dsb(ish);
> +}
> #endif
Acked-by: Will Deacon <will.deacon@....com>
Will
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