linux-kernel - [PATCH 0/7] irqchip/gic-v3: LPI allocation refactoring

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Date:   Wed, 20 Jun 2018 14:52:27 +0100
From:   Marc Zyngier <marc.zyngier@....com>
To:     linux-kernel@...r.kernel.org
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Ard Biesheuvel <ard.biesheuvel@...aro.org>,
        Shanker Donthineni <shankerd@...eaurora.org>,
        Shameer Kolothum <shameerali.kolothum.thodi@...wei.com>,
        MaJun <majun258@...wei.com>,
        Laurentiu Tudor <laurentiu.tudor@....com>,
        Lei Zhang <zhang.lei@...fujitsu.com>
Subject: [PATCH 0/7] irqchip/gic-v3: LPI allocation refactoring

The GICv3 LPI allocator has served us well so far, but a number of new
use cases have recently showed up:

- A new extension to the GICv3 architecture allows a hypervisor to
  dramatically restrict the range of available LPIs. This means that
  our current policy of allocating LPIs in blocks of 32 may quickly
  deplete the number of devices that get LPIs

- New and currently undisclosed busses seem to come with thousands of
  devices, each requiring a single LPI. Again, our current allocation
  policy means they quickly run out of LPIs.

Simply expanding the bitmap doesn't seem to be a great idea, so let's
change the LPI allocator altogether. This means we can move individual
busses to a more minimal allocation scheme, though we only do it for
PCI at the moment (Platform MSI looks like the Far West, and I'm
clueless about the FSL MC thing).

This is a pretty invasive change, and I'm thus cc'ing the usual
suspects that have access to weird and wonderful HW to verify
everything still works as expected, and let me know if we can relax
the allocation for their own pet bus implementation.

Only lightly tested in a KVM guest (PCI).


Marc Zyngier (7):
  irqchip/gic-v3-its: Refactor LPI allocator
  irqchip/gic-v3-its: Use full range of LPIs
  irqchip/gic-v3-its: Move minimum LPI requirements to individual busses
  irqchip/gic-v3-its: Drop chunk allocation compatibility
  irqchip/gic-v3: Expose GICD_TYPER in the rdist structure
  irqchip/gic-v3-its: Honor hypervisor enforced LPI range
  irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices

 drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c   |   3 +
 drivers/irqchip/irq-gic-v3-its-pci-msi.c      |  16 +-
 drivers/irqchip/irq-gic-v3-its-platform-msi.c |   2 +
 drivers/irqchip/irq-gic-v3-its.c              | 225 ++++++++++++------
 drivers/irqchip/irq-gic-v3.c                  |   4 +-
 include/linux/irqchip/arm-gic-v3.h            |   3 +-
 6 files changed, 169 insertions(+), 84 deletions(-)

-- 
2.17.1