linux-kernel - Re: [PATCH] ARM: dts: imx6sl: Add vivante gpu nodes

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Date:   Thu, 12 Jul 2018 10:46:19 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     Leonard Crestez <leonard.crestez@....com>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        Lucas Stach <l.stach@...gutronix.de>,
        The etnaviv authors <etnaviv@...ts.freedesktop.org>,
        DRI mailing list <dri-devel@...ts.freedesktop.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Christian Gmeiner <christian.gmeiner@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        Sascha Hauer <kernel@...gutronix.de>,
        Russell King <linux+etnaviv@...linux.org.uk>,
        Fabio Estevam <fabio.estevam@....com>,
        Marius Vlad <marius-cristian.vlad@....com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] ARM: dts: imx6sl: Add vivante gpu nodes

Hi Leonard,

On Thu, Jul 12, 2018 at 10:37 AM, Leonard Crestez
<leonard.crestez@....com> wrote:

> diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
> index a6bc21433839..49a56b4fd393 100644
> --- a/arch/arm/boot/dts/imx6sl.dtsi
> +++ b/arch/arm/boot/dts/imx6sl.dtsi
> @@ -130,10 +130,30 @@
>                         cache-level = <2>;
>                         arm,tag-latency = <4 2 3>;
>                         arm,data-latency = <4 2 3>;
>                 };
>
> +               gpu_2d: gpu@...0000 {
> +                       compatible = "vivante,gc";
> +                       reg = <0x02200000 0x4000>;
> +                       interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&clks IMX6SL_CLK_MMDC_ROOT>,
> +                                <&clks IMX6SL_CLK_GPU2D_OVG>;
> +                       clock-names = "bus", "core";
> +                       power-domains = <&pd_pu>;
> +               };
> +
> +               gpu_vg: gpu@...4000 {
> +                       compatible = "vivante,gc";
> +                       reg = <0x02204000 0x4000>;
> +                       interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&clks IMX6SL_CLK_MMDC_ROOT>,
> +                                <&clks IMX6SL_CLK_GPU2D_OVG>;
> +                       clock-names = "bus", "core";
> +                       power-domains = <&pd_pu>;
> +               };
> +
>                 aips1: aips-bus@...0000 {

We try to keep the peripherals sorted by address range in dtsi, so
please put the gpu nodes below aips2.