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Date:   Tue, 17 Jul 2018 13:36:10 +0300
From:   Adrian Hunter <adrian.hunter@...el.com>
To:     Chunyan Zhang <zhang.lyra@...il.com>
Cc:     Chunyan Zhang <zhang.chunyan@...aro.org>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        linux-mmc@...r.kernel.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Orson Zhai <orsonzhai@...il.com>,
        Baolin Wang <baolin.wang@...aro.org>,
        Billows Wu <billows.wu@...eadtrum.com>
Subject: Re: [PATCH V3 4/7] mmc: sdhci: add 32-bit block count support for v4
 mode

On 17/07/18 12:14, Chunyan Zhang wrote:
> Hi,
> 
> On 17 July 2018 at 16:29, Adrian Hunter <adrian.hunter@...el.com> wrote:
>> On 09/07/18 06:19, Chunyan Zhang wrote:
>>> When Host Version 4 is enabled, SDMA System Address register is
>>> re-defined as 32-bit Block Count, and SDMA uses ADMA System
>>> Address register (05Fh-058h) instead.
>>>
>>> Signed-off-by: Chunyan Zhang <zhang.chunyan@...aro.org>
>>> ---
>>>  drivers/mmc/host/sdhci.c | 4 +++-
>>>  drivers/mmc/host/sdhci.h | 1 +
>>>  2 files changed, 4 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
>>> index 7871ae2..f64e766 100644
>>> --- a/drivers/mmc/host/sdhci.c
>>> +++ b/drivers/mmc/host/sdhci.c
>>> @@ -889,6 +889,7 @@ static void sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd)
>>>  static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd)
>>>  {
>>>       u8 ctrl;
>>> +     u32 reg;
>>>       struct mmc_data *data = cmd->data;
>>>
>>>       host->data_timeout = 0;
>>> @@ -1021,7 +1022,8 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd)
>>>       /* Set the DMA boundary value and block size */
>>>       sdhci_writew(host, SDHCI_MAKE_BLKSZ(host->sdma_boundary, data->blksz),
>>>                    SDHCI_BLOCK_SIZE);
>>> -     sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
>>> +     reg = host->v4_mode ? SDHCI_32BIT_BLK_CNT : SDHCI_BLOCK_COUNT;
>>> +     sdhci_writew(host, data->blocks, reg);
>>
>> The specification says to set 16-bit block count register to zero when using
>> 32-bit block count.  It also says it is valid for V4.1 onwards and also for
>> V4 with SDMA and auto-CMD23.
>>
>> So maybe we should continue to use the 16-bit block count register with V4.0
> 
> Ok.
> 
> Where can I get a V4.0 specification? I only have V4.10 on hands.

I do not have a copy I can share, but the 4.1 specification already
indicates what is V4.1 (onwards) and what only requires Host Version 4 Enable.

> 
>>
>>>  }
>>>
>>>  static inline bool sdhci_auto_cmd12(struct sdhci_host *host,
>>> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
>>> index 24fa58a..889e48b 100644
>>> --- a/drivers/mmc/host/sdhci.h
>>> +++ b/drivers/mmc/host/sdhci.h
>>> @@ -28,6 +28,7 @@
>>>
>>>  #define SDHCI_DMA_ADDRESS    0x00
>>>  #define SDHCI_ARGUMENT2              SDHCI_DMA_ADDRESS
>>> +#define SDHCI_32BIT_BLK_CNT  SDHCI_DMA_ADDRESS
>>>
>>>  #define SDHCI_BLOCK_SIZE     0x04
>>>  #define  SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF))
>>>
>>
> 

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