lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 30 Jul 2018 14:50:42 +0200
From:   Michal Simek <michal.simek@...inx.com>
To:     Stephen Boyd <sboyd@...nel.org>,
        "ard.biesheuvel@...aro.org" <ard.biesheuvel@...aro.org>,
        "dmitry.torokhov@...il.com" <dmitry.torokhov@...il.com>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "keescook@...omium.org" <keescook@...omium.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "matt@...eblueprint.co.uk" <matt@...eblueprint.co.uk>,
        "mingo@...nel.org" <mingo@...nel.org>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "sboyd@...eaurora.org" <sboyd@...eaurora.org>,
        "sudeep.holla@....com" <sudeep.holla@....com>,
        Jolly Shah <JOLLYS@...inx.com>,
        Michal Simek <michal.simek@...inx.com>
CC:     "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Rajan Vaja <RAJANV@...inx.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v10 00/10] drivers: Introduce firmware dnd clock river for
 ZynqMP core

On 26.7.2018 18:36, Stephen Boyd wrote:
> Quoting Michal Simek (2018-07-25 02:51:14)
>> On 24.7.2018 20:14, Jolly Shah wrote:
>>>>>  create mode 100644 drivers/firmware/xilinx/zynqmp-debug.h
>>>>>  create mode 100644 drivers/firmware/xilinx/zynqmp.c  create mode
>>>>> 100644 include/dt-bindings/clock/xlnx,zynqmp-clk.h
>>>>>  create mode 100644 include/linux/firmware/xlnx-zynqmp.h
>>>>>
>>>>
>>>> It looks pretty calm over the last several series that's why when I get an answer
>>>> from Stephen or Mike I will take this series via my tree and arm-soc tree.
>>>>
>>>> I have applied 01-08 here
>>>>  https://github.com/Xilinx/linux-xlnx/commits/zynqmp/soc
>>>>
>>>> Thanks,
>>>> Michal
>>>
>>>
>>> Thanks for merging the patches. 
>>> By mistake I added “Reviewed-by: Stephen Boyd sboyd@...nel.org” for firmware bindings (Patch01).  Stephen had reviewed clock bindings only.  Please suggest if I should send a new version with that fix.
>>
>> I have fixed that in my branch and I have asked Shephen to look at clk
>> over chat.
>>
> 
> I have some unresolved review comments on v9. I'll give reviewed-by when
> that discussion is resolved.

ok. Do you want to take them via clk tree or via arm-soc tree?

Thanks,
Michal


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ