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Date:   Thu, 2 Aug 2018 04:35:55 -0700
From:   Christoph Hellwig <hch@...radead.org>
To:     Alan Kao <alankao@...estech.com>
Cc:     linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        Palmer Dabbelt <palmer@...ive.com>,
        Albert Ou <albert@...ive.com>,
        Christoph Hellwig <hch@...radead.org>,
        Andrew Waterman <andrew@...ive.com>,
        Arnd Bergmann <arnd@...db.de>,
        Darius Rad <darius@...espec.com>,
        Vincent Chen <vincentc@...estech.com>,
        Zong Li <zong@...estech.com>, Nick Hu <nickhu@...estech.com>,
        Greentime Hu <greentime@...estech.com>
Subject: Re: [PATCH v3 1/4] Extract FPU context operations from entry.S

> diff --git a/arch/riscv/kernel/fpu.S b/arch/riscv/kernel/fpu.S
> new file mode 100644
> index 000000000000..3210ef502e55
> --- /dev/null
> +++ b/arch/riscv/kernel/fpu.S
> @@ -0,0 +1,105 @@
> +/*
> + * Copyright (C) 2012 Regents of the University of California
> + * Copyright (C) 2017 SiFive
> + *
> + *   This program is free software; you can redistribute it and/or
> + *   modify it under the terms of the GNU General Public License
> + *   as published by the Free Software Foundation, version 2.
> + *
> + *   This program is distributed in the hope that it will be useful,
> + *   but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *   GNU General Public License for more details.
> + */

It would be good to have SPDX headers fo every new file (and eventually
switch the other RISC-V code over).

Otherwise this looks good:

Reviewed-by: Christoph Hellwig <hch@....de>

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