linux-kernel - Re: [PATCH v2 2/3] arm64: dts: qcom: sdm845: Add SD node

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 6 Dec 2018 15:56:10 -0800
From:   Bjorn Andersson <bjorn.andersson@...aro.org>
To:     Evan Green <evgreen@...omium.org>
Cc:     Andy Gross <andy.gross@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Douglas Anderson <dianders@...omium.org>,
        devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, David Brown <david.brown@...aro.org>,
        Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH v2 2/3] arm64: dts: qcom: sdm845: Add SD node

On Thu 06 Dec 10:45 PST 2018, Evan Green wrote:

> Add one of the two SD controllers to SDM845.
> 
> Signed-off-by: Evan Green <evgreen@...omium.org>
> Reviewed-by: Douglas Anderson <dianders@...omium.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>

Regards,
Bjorn

> ---
> 
> Changes in v2:
>  - Reworded commit message to note that there are multiple SD
>  controllers.
> 
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 1419b0098cb38..bb8eacdf40910 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -1078,6 +1078,21 @@
>  			};
>  		};
>  
> +		sdhc_2: sdhci@...4000 {
> +			compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5";
> +			reg = <0x8804000 0x1000>;
> +
> +			interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "hc_irq", "pwr_irq";
> +
> +			clocks = <&gcc GCC_SDCC2_AHB_CLK>,
> +				 <&gcc GCC_SDCC2_APPS_CLK>;
> +			clock-names = "iface", "core";
> +
> +			status = "disabled";
> +		};
> +
>  		usb_1_hsphy: phy@...2000 {
>  			compatible = "qcom,sdm845-qusb2-phy";
>  			reg = <0x88e2000 0x400>;
> -- 
> 2.18.1
>