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Date:   Fri, 20 Sep 2019 11:46:13 -0600
From:   Keith Busch <kbusch@...nel.org>
To:     Mario Limonciello <mario.limonciello@...l.com>
Cc:     Jens Axboe <axboe@...com>, Christoph Hellwig <hch@....de>,
        Sagi Grimberg <sagi@...mberg.me>,
        linux-nvme@...ts.infradead.org,
        LKML <linux-kernel@...r.kernel.org>,
        Ryan Hong <Ryan.Hong@...l.com>, Crag Wang <Crag.Wang@...l.com>,
        sjg@...gle.com, Jared Dominguez <jared.dominguez@...l.com>
Subject: Re: [PATCH v2] nvme-pci: Save PCI state before putting drive into
 deepest state

On Wed, Sep 18, 2019 at 01:15:55PM -0500, Mario Limonciello wrote:
> The action of saving the PCI state will cause numerous PCI configuration
> space reads which depending upon the vendor implementation may cause
> the drive to exit the deepest NVMe state.
> 
> In these cases ASPM will typically resolve the PCIe link state and APST
> may resolve the NVMe power state.  However it has also been observed
> that this register access after quiesced will cause PC10 failure
> on some device combinations.
> 
> To resolve this, move the PCI state saving to before SetFeatures has been
> called.  This has been proven to resolve the issue across a 5000 sample
> test on previously failing disk/system combinations.
> 
> Signed-off-by: Mario Limonciello <mario.limonciello@...l.com>

This looks good. It clashes with something I posted yesterday, but
I'll rebase after this one.

Reviewed-by: Keith Busch <kbusch@...nel.org>

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